MP6605C

– 4-CHANNEL LOW-SIDE DRIVER WITH I2C INTERFACE

MP6605C Rev. 1.0

MonolithicPower.com

4

7/11/2022

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© 2022 MPS. All Rights Reserved.

PIN FUNCTIONS

Pin #

Name

Description

6

VIN

Input supply voltage. Decouple the VIN pin with a minimum 100nF ceramic

capacitor connected to GND. Additional bulk capacitance may be required.

4

VCLAMP

High-side clamp. Connect the VCLAMP pin to VIN with a TVS or Zener diode to

clamp the leakage inductance spike.

7, exposed

pad

GND

Power ground.

1

SDA

I2C data.

2

SCL

I2C clock.

11

A0

Address setting input. Connect the A0~A3 pins to ground or leave them open to

configure the I2C interface address. These pins have an internal pull-up resistor, and

are connected to an internal supply voltage (about 6V).

12

A1

20

A2

19

A3

8

SIN0

Sensor input 0. The SIN0 pin has an internal pull-down resistor.

9

SIN1

Sensor input 1. The SIN1 pin has an internal pull-down resistor.

10

SIN2

Sensor input 2. The SIN2 pin has an internal pull-down resistor.

21

RESET

Device reset input. Drive the RESET pin active high to initialize the digital logic.

RESET has an internal pull-down resistor.

22

nENBL

Enable input. Drive the nENBL pin to logic high to disable the outputs; drive nENBL

to logic low to enable the outputs. The state of nENBL does not affect the I2C

interface. nENBL has an internal pull-down resistor.

23

nFAULT

Fault indication. The nFAULT pin is an open-drain output that requires an external

pull-up resistor when it is used. If a fault condition occurs, nFAULT is driven low.

17

OUT1

Output terminal 1.

16

OUT2

Output terminal 2.

15

OUT3

Output terminal 3.

14

OUT4

Output terminal 4.

ABSOLUTE MAXIMUM RATINGS (1)

Supply voltage (VIN) ......................-0.3V to +65V

OUTx voltage (VOUTx) ....................-0.7V to +65V

Clamp voltage (VCLAMP) .................-0.7V to +65V

A0, A1, A2, A3 ................................-0.3V to +9V

All other pins to GND ...................-0.3V to +6.5V

Continuous power dissipation (TA = 25°C) (2)

................................................................... 2.9W

Storage temperature ................ -55°C to +150°C

Junction temperature ............................. +150°C

Lead temperature (solder) ..................... +260°C

ESD Ratings

Human body model (HBM) ……………….. ±2kV

Charged device model (CDM) …………… ±2kV

Recommended Operating Conditions (3)

Supply voltage (VIN) .........................4.5V to 60V

Output voltage (VOUTx).........................0V to 60V

Maximum output current for LS-FETs (ILSX)…….

…………………………………………………1.5A

Maximum output current for high-side diodes

(IHSX) ………………….. 1.5A at duty cycle <20%

Operating junction temp (TJ) .... -40°C to +125°C

Thermal Resistance (4)

θJA

θJC

QFN-24 (4mmx4mm)............. 42........ 9 .... °C/W

Notes:

1) Exceeding these ratings may damage the device.

2) The maximum allowable power dissipation is a function of the

maximum junction temperature, TJ (MAX), the junction-to-

ambient thermal resistance,

θ

JA, and the ambient temperature,

TA. The maximum allowable continuous power dissipation at

any ambient temperature is calculated by PD (MAX) = (TJ

(MAX) - TA) / θJA. Exceeding the maximum allowable power

dissipation can produce an excessive die temperature, and the

regulator may go into thermal shutdown. Internal thermal

shutdown circuitry protects the device from permanent

damage.

3) The device is not guaranteed to function outside of its operating

conditions.

4) Measured on JESD51-7, 4-layer PCB.