WM8772SEDSSLASHV datasheet(16/73 Pages) WOLFSON

部件名	WM8772SEDS/V

功能描述	24-bit, 192kHz 6-Channel Codec with Volume Control

PDF	73 Pages

Scroll/Zoom	100%

制造商	WOLFSON [Wolfson Microelectronics plc]

网页	http://www.wolfsonmicro.com

标志

16 / 73 page

WM8772EDS – 28 LEAD SSOP

Production Data

PD Rev 4.2 October 2005

PAGES 12 TO 36 DESCRIBE THE OPERATION OF THE WM8772EDS

28 LEAD SSOP PRODUCT VARIANT.

PAGES 37 TO 66 DESCRIBE THE OPERATION OF THE WM8772EFT

32 LEAD TQFP PRODUCT VARIANT.

WM8772EDS – 28 LEAD SSOP

MASTER CLOCK TIMING

MCLK

MCLKL

MCLKH

MCLKY

Figure 13 ADC and DAC Master Clock Timing Requirements

Test Conditions

AVDD, VREFP = 5V, DVDD = 3.3V, AGND, VREFN = 0V, AGND, DGND = 0V, TA = +25

oC, fs = 48kHz, DACMCLK and

ADCMCLK = 256fs unless otherwise stated.

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNIT

System Clock Timing Information

MCLK System clock pulse width

high

tMCLKH

MCLK System clock pulse width

low

tMCLKL

MCLK System clock cycle time

tMCLKY

MCLK Duty cycle

40:60

60:40

Table 2 Master Clock Timing Requirements

DIGITAL AUDIO INTERFACE – MASTER MODE

LRC

DOUT

DIN1/2/3

WM8772

CODEC

DSP/

ENCODER/

DECODER

BCLK

Figure 14 Audio Interface - Master Mode

WM8772SEDS/V 数据表(PDF) 16 Page - Wolfson Microelectronics plc

WM8772SEDS/V 数据表(HTML) 16 Page - Wolfson Microelectronics plc

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