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AT89C5131A-RDTIL 数据表(PDF) 115 Page - ATMEL Corporation |
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AT89C5131A-RDTIL 数据表(HTML) 115 Page - ATMEL Corporation |
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115 / 185 page  115 AT89C5131A-L 4338E–USB–06/06 1 SD1 Address bit 1 or Data bit 1. 0 SD0 Address bit 0 (R/W) or Data bit 0. Table 88. SSCS (094h) Read - Synchronous Serial Control and Status Register 7 6 5 432 10 SC4 SC3 SC2 SC1 SC0 0 0 0 Bit Number Bit Mnemonic Description 00 Always zero 10 Always zero 20 Always zero 3SC0 Status Code bit 0 See Table 81 to Table 85 4SC1 Status Code bit 1 See Table 81 to Table 85 5SC2 Status Code bit 2 See Table 81 to Table 85 6SC3 Status Code bit 3 See Table 81 to Table 85 7SC4 Status Code bit 4 See Table 81 to Table 85 Table 89. SSADR (096h) - Synchronous Serial Address Register (read/write) 7 6 5 432 10 A7 A6 A5 A4 A3 A2 A1 A0 Bit Number Bit Mnemonic Description 7A7 Slave address bit 7. 6A6 Slave address bit 6. 5A5 Slave address bit 5. 4A4 Slave address bit 4. 3A3 Slave address bit 3. 2A2 Slave address bit 2. 1A1 Slave address bit 1. 0GC General call bit Clear to disable the general call address recognition. Set to enable the general call address recognition. Bit Number Bit Mnemonic Description |
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