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AT89C5131A-RDTIL 数据表(PDF) 56 Page - ATMEL Corporation |
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AT89C5131A-RDTIL 数据表(HTML) 56 Page - ATMEL Corporation |
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56 / 185 page  56 AT89C5131A-L 4338E–USB–06/06 Figure 27. PCA Timer/Counter Table 48. CMOD Register CMOD - PCA Counter Mode Register (D9h) Reset Value = 00XX X000b Not bit addressable CIDL CPS1 CPS0 ECF It CH CL 16 Bit Up Counter To PCA modules FCLK PERIPH/6 FCLK PERIPH/2 T0 OVF P1.2 Idle CMOD 0xD9 WDTE CF CR CCON 0xD8 CCF4 CCF3 CCF2 CCF1 CCF0 overflow 7 6 5 4 3 2 1 0 CIDL WDTE - - - CPS1 CPS0 ECF Bit Number Bit Mnemonic Description 7CIDL Counter Idle Control Cleared to program the PCA Counter to continue functioning during idle Mode. Set to program PCA to be gated off during idle. 6WDTE Watchdog Timer Enable Cleared to disable Watchdog Timer function on PCA Module 4. Set to enable Watchdog Timer function on PCA Module 4. 5- Reserved The value read from this bit is indeterminate. Do not set this bit. 4- Reserved The value read from this bit is indeterminate. Do not set this bit. 3- Reserved The value read from this bit is indeterminate. Do not set this bit. 2CPS1 PCA Count Pulse Select CPS1CPS0 Selected PCA input 0 0 Internal clock f CLK PERIPH/6 0 1 Internal clock f CLK PERIPH/2 1 0 Timer 0 Overflow 1 1 External clock at ECI/P1.2 pin (max rate = fCLK PERIPH/ 4) 1CPS0 0ECF PCA Enable Counter Overflow Interrupt Cleared to disable CF bit in CCON to inhibit an interrupt. Set to enable CF bit in CCON to generate an interrupt. |
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