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AT89C5131A-RDTIL 数据表(PDF) 41 Page - ATMEL Corporation |
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AT89C5131A-RDTIL 数据表(HTML) 41 Page - ATMEL Corporation |
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41 / 185 page ![]() 41 AT89C5131A-L 4338E–USB–06/06 EEPROM Data Memory Description The 1-Kbyte on-chip EEPROM memory block is located at addresses 0000h to 03FFh of the ERAM memory space and is selected by setting control bits in the EECON register. A read in the EEPROM memory is done with a MOVX instruction. A physical write in the EEPROM memory is done in two steps: write data in the column latches and transfer of all data latches into an EEPROM memory row (programming). The number of data written on the page may vary from 1 to 128 bytes (the page size). When programming, only the data written in the column latch is programmed and a ninth bit is used to obtain this feature. This provides the capability to program the whole mem- ory by bytes, by page or by a number of bytes in a page. Indeed, each ninth bit is set when the writing the corresponding byte in a row and all these ninth bits are reset after the writing of the complete EEPROM row. Write Data in the Column Latches Data is written by byte to the column latches as for an external RAM memory. Out of the 11 address bits of the data pointer, the 4 MSBs are used for page selection (row) and 7 are used for byte selection. Between two EEPROM programming sessions, all the addresses in the column latches must stay on the same page, meaning that the 4 MSB must not be changed. The following procedure is used to write to the column latches: • Set bit EEE of EECON register • Load DPTR with the address to write • Store A register with the data to be written • Execute a MOVX @DPTR, A • If needed, loop the three last instructions until the end of a 128 bytes page Programming The EEPROM programming consists on the following actions: • Writing one or more bytes of one page in the column latches. Normally, all bytes must belong to the same page; if not, the first page address will be latched and the others discarded. • Launching programming by writing the control sequence (52h followed by A2h) to the EECON register. • EEBUSY flag in EECON is then set by hardware to indicate that programming is in progress and that the EEPROM segment is not available for reading. • The end of programming is indicated by a hardware clear of the EEBUSY flag. Read Data The following procedure is used to read the data stored in the EEPROM memory: • Set bit EEE of EECON register • Stretch the MOVX to accommodate the slow access time of the column latch (Set bit M0 of AUXR register) • Load DPTR with the address to read • Execute a MOVX A, @DPTR |
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