AMC131M01DFMR datasheet(47/81 Pages) TI

部件名	AMC131M01DFMR

功能描述	AMC131M01 1-Channel, 64-kSPS, Simultaneous-Sampling, 24-Bit, Reinforced Isolated Delta-Sigma ADC With Integrated DC/DC Converter

PDF	81 Pages

Scroll/Zoom	100%

制造商	TI [Texas Instruments]

网页	http://www.ti.com

标志

47 / 81 page

Another functionally equivalent method for clearing the FIFO after a pause in collecting data is to begin by

reading two samples in quick succession. Figure 8-27 shows this method. This example shows that when the

DRDY_FMT bit in the MODE register is set to 0b, DRDY is a level output. There is a very narrow pulse on

DRDY immediately after the first set of data are shifted out of the device. This pulse can be too narrow for some

microcontrollers to detect. Therefore, do not rely upon this pulse but instead immediately read out the second

data set after the first data set. The host operates synchronous to the device after the second word is read from

the device.

DRDY

SCLK

DOUT

CRC

Data

Hi-Z

Status

CRC

Data

Status

CRC

Data

Time where data is

not being read

Narrow DRDY Pulse

Data is read a

second time

Figure 8-27. Collecting Data After a Pause by Reading Data Twice

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AMC131M01

SBASA57 – SEPTEMBER 2023

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AMC131M01DFMR 数据表(PDF) 47 Page - Texas Instruments