DAP002 datasheet(14/23 Pages) STMICROELECTRONICS

14 / 23 page

now disconnected and CT is charged through RA

only. In this way the oscillator frequency (fSB) will

be lower. Refer to pin 2 description to see how to

calculate the timing components.

Typical values for VT1 and VT2 are 2.5 V and 4V

respectively. This 1.5V hysteresis is enough to

prevent undesired frequency change up to a 5.5

to 1 fosc/ fSB ratio.

The value of VT1 is such that in a discontinuous

flyback the standby frequency is activated when

the input power is about 13% of the maximum. If

necessary, it is possible to decrease the power

threshold below 13% by adding a DC offset (Vo)

on the current sense pin (13, ISEN). This will also

allow a frequency change greater than 5.5 to 1.

The following equations, useful for design, apply:

PinSB

⋅ LP ⋅ ƒosc ⋅







0.367

− Vo

Rsense







(12),

PinNO

⋅ LP ⋅ ƒSB ⋅







0.867

− Vo

Rsense







(13),

ƒosc

ƒSB <







0.867

− Vo

0.367

− Vo







(14),

where PinSB is the input power below which the

L5991 recognizes a light load and switches the

oscillator frequency from

ƒosc to fSB, PinNO is the

input power above which the L5991 switches

back from

ƒSB to ƒosc and Lp the primary induc-

tance of the flyback transformer.

Connect to Vref or leave open this pin when

stand-by function is not used.

Layout hints

Generally speaking a proper circuitboard layout is

vital for correct operation but is not an easy task.

Careful component placing, correct traces routing,

appropriate traces widths and, in case of high

voltages, compliance with isolation distances are

the major issues. The L5991 eases this task by

putting two pins at disposal for separate current

returns of bias (SGND) and switch drive currents

(PGND) The matter is complex and only few im-

portant points will be here reminded.

1) All current returns (signal ground, power

ground, shielding, etc.) should be routed sepa-

rately and should be connected only at a single

ground point.

2) Noise coupling can be reduced by minimizing

the area circumscribed by current loops. This

applies particularly to loops where high pulsed

currents flow.

3) For high current paths, the traces should be

doubled on the other side of the PCB whenever

possible: this will reduce both the resistance

and the inductance of the wiring.

4) Magnetic field radiation (and stray inductance)

can be reduced by keeping all traces carrying

switched currents as short as possible.

5) In general, traces carrying signal currents

should run far from traces carrying pulsed cur-

rents or with quickly swinging voltages. From

this viewpoint, particular care should be taken

of the high impedance points (current sense in-

put, feedback input, ...). It could be a good idea

to route signal traces on one PCB side and

power traces on the other side.

6) Provide adequate filtering of some crucial

points of the circuit, such as voltage references,

IC’s supply pins, etc.

L5991 - L5991A

14/23

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