AD8061/AD8062/AD8063

Rev. D | Page 14 of 20

CIRCUIT DESCRIPTION

The AD8061/AD8062/AD8063 family is comprised of high

speed voltage feedback op amps. The high slew rate input stage

is a true, single-supply topology, capable of sensing signals at or

below the minus supply rail. The rail-to-rail output stage can

pull within 30 mV of either supply rail when driving light loads

and within 0.3 V when driving 150 Ω. High speed perform-

ance is maintained at supply voltages as low as 2.7 V.

HEADROOM CONSIDERATIONS

These amplifiers are designed for use in low voltage systems.

To obtain optimum performance, it is useful to understand the

behavior of the amplifier as input and output signals approach

the amplifier’s headroom limits.

The AD806x’s input common-mode voltage range extends

from the negative supply voltage (actually 200 mV below this),

or ground for single-supply operation, to within 1.8 V of the

positive supply voltage. Thus, at a gain of 2, the AD806x can

provide full rail-to-rail output swing for supply voltage as low as

output range down to 2.7 V total supply voltage.

Exceeding the headroom limit is not a concern for any inverting

gain on any supply voltage, as long as the reference voltage at

the amplifier’s positive input lies within the amplifier’s input

common-mode range.

The input stage is the headroom limit for signals when the

amplifier is used in a gain of 1 for signals approaching the

positive rail. Figure 45 shows a typical offset voltage vs.

input common-mode voltage for the AD806x amplifier on

a 5 V supply. Accurate dc performance is maintained from

approximately 200 mV below the minus supply to within

1.8 V of the positive supply. For high-speed signals, however,

there are other considerations. Figure 46 shows −3 dB

bandwidth vs. dc input voltage for a unity-gain follower. As

the common-mode voltage approaches the positive supply,

the amplifier holds together well, but the bandwidth begins to

This manifests itself in increased distortion or settling time.

Figure 16 plots the distortion of a 1 V p-p signal with the

AD806x amplifier used as a follower on a 5 V supply vs. signal

common-mode voltage. Distortion performance is maintained

until the input signal center voltage gets beyond 2.5 V, as the

peak of the input sine wave begins to run into the upper

common-mode voltage limit.

–4.0

–3.6

–3.2

–2.8

–2.4

–2.0

–1.6

–1.2

–0.8

–0.4

–0.5

0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

FREQUENCY (MHz)

2

–8

0.1

–4

0

–2

–6

1

10

100

1k

10k

Higher frequency signals require more headroom than lower

frequencies to maintain distortion performance. Figure 47

illustrates how the rising edge settling time for the amplifier

configured as a unity-gain follower stretches out as the top of

a 1 V step input approaches and exceeds the specified input

common-mode voltage limit.

For signals approaching the minus supply and inverting gain

and high positive gain configurations, the headroom limit is

the output stage. The AD806x amplifiers use a common emitter

style output stage. This output stage maximizes the available

output range, limited by the saturation voltage of the output

transistors. The saturation voltage increases with the drive

current the output transistor is required to supply, due to the

output transistors’ collector resistance. The saturation voltage is

is the output current, and 8 Ω is a typical value for the output

transistors’ collector resistance.