AT89C51AC3-RDTUM datasheet(27/143 Pages) ATMEL

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AT89C51AC3

4383B–8051–01/05

Power Monitor

The POR/PFD function monitors the internal power-supply of the CPU core memories

and the peripherals, and if needed, suspends their activity when the internal power sup-

ply falls below a safety threshold. This is achieved by applying an internal reset to them.

By generating the Reset the Power Monitor insures a correct start up when

AT89C51CC03 is powered up.

Description

In order to startup and maintain the microcontroller in correct operating mode, VCC has

to be stabilized in the VCC operating range and the oscillator has to be stabilized with a

nominal amplitude compatible with logic level VIH/VIL.

These parameters are controlled during the three phases: power-up, normal operation

and power going down. See Figure 14.

Figure 14. Power Monitor Block Diagram

Note:

1. Once XTAL1 high and low levels reach above and below VIH/VIL a 1024 clock period

delay will extend the reset coming from the Power Fail Detect. If the power falls below

the Power Fail Detect thresthold level, the reset will be applied immediately.

The Voltage regulator generates a regulated internal supply for the CPU core the mem-

ories and the peripherals. Spikes on the external Vcc are smoothed by the voltage

regulator.

The Power fail detect monitor the supply generated by the voltage regulator and gener-

ate a reset if this supply falls below a safety threshold as illustrated in the Figure 15.

VCC

Power On Reset

Power Fail Detect

Voltage Regulator

XTAL1

(1)

CPU core

Memories

Peripherals

Regulated

Supply

RST pin

Hardware

Watchdog

PCA

Watchdog

Internal Reset

AT89C51AC3-RDTUM 数据表(PDF) 27 Page - ATMEL Corporation

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