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Bus Transactions

Writes

SCL

Start Condition

Data 1 Valid

SDA

Write to Port

Data Out

From Port

R/W

ACK From Slave

ACK From Slave

ACK From Slave

1

9

8

7

6

5

4

3

2

Data 1

1

0

1

0

S

0

0

0

1

0

A

0

0

0

0

0

0

0

A

A

P

Data to Port

Command Byte

Slave Address

Data

1

0

1

0

S

0

0

0

1

0

A

1

0

0

0

0

0

0

A

A

P

SCL

SDA

Data to

Register

Start Condition

R/W

ACK From Slave

ACK From Slave

ACK From Slave

1

9

8

7

6

5

4

3

2

Data to Register

Command Byte

Slave Address

PCA9536

WITH CONFIGURATION REGISTERS

SCPS125C – APRIL 2006 – REVISED NOVEMBER 2006

Data is exchanged between the master and PCA9536 through write and read commands.

Data is transmitted to the PCA9536 by sending the device address and setting the least-significant bit (LSB) to a

logic 0 (see Figure 4 for device address). The command byte is sent after the address and determines which

register receives the data that follows the command byte. There is no limitation on the number of data bytes sent

in one write transmission (see Figure 6 and Figure 7).

Figure 6. Write to Output Port Register

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Figure 7. Write to Configuration or Polarity Inversion Registers

8

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