AM29F017D datasheet(14/41 Pages) AMD

14 / 41 page

Am29F017D

21195E5 September 12, 2006

DA TA

SH EET

COMMON FLASH MEMORY INTERFACE

(CFI)

The Common Flash Interface (CFI) specification out-

lines device and host system software interrogation

handshake, which allows specific vendor-specified

software algorithms to be used for entire families of de-

vices. Software support can then be device-indepen-

dent, JEDEC ID-independent, and forward- and

backward-compatible for the specified flash device

families. Flash vendors can standardize their existing

interfaces for long-term compatibility.

This device enters the CFI Query mode when the sys-

tem writes the CFI Query command, 98h, to any ad-

dress (XXh), any time the device is ready to read array

data. The system can read CFI information at the ad-

dresses given in Tables 5–8. To terminate reading CFI

data, the system must write the reset command.

The system can also write the CFI query command

when the device is in the autoselect mode. The device

enters the CFI query mode, and the system can read

CFI data at the addresses given in Tables 5–8. The sys-

tem must write the reset command to return the device

to the autoselect mode.

For further information, please refer to the CFI Specifi-

cation and CFI Publication 100, available via the World

Wide Web at http://www.amd.com/products/nvd/over-

view/cfi.html. Alternatively, contact an AMD represen-

tative for copies of these documents.

Table 5.

CFI Query Identification String

Addresses

Data

Description

10h

11h

12h

51h

52h

59h

Query Unique ASCII string “QRY”

13h

14h

02h

00h

Primary OEM Command Set

15h

16h

40h

00h

Address for Primary Extended Table

17h

18h

00h

Alternate OEM Command Set (00h = none exists)

19h

1Ah

00h

Address for Alternate OEM Extended Table (00h = none exists)

Table 6.

System Interface String

Addresses

Data

Description

1Bh

45h

VCC Min. (write/erase)

D7–D4: volt, D3–D0: 100 millivolt

1Ch

55h

VCC Max. (write/erase)

D7–D4: volt, D3–D0: 100 millivolt

1Dh

00h

VPP Min. voltage (00h = no VPP pin present)

1Eh

00h

VPP Max. voltage (00h = no VPP pin present)

1Fh

03h

Typical timeout per single byte/word write 2N µs

20h

00h

Typical timeout for Min. size buffer write 2N µs (00h = not supported)

21h

0Ah

Typical timeout per individual block erase 2N ms

22h

00h

Typical timeout for full chip erase 2N ms (00h = not supported)

23h

05h

Max. timeout for byte/word write 2N times typical

24h

00h

Max. timeout for buffer write 2N times typical

25h

04h

Max. timeout per individual block erase 2N times typical

26h

00h

Max. timeout for full chip erase 2N times typical (00h = not supported)

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