AM29DL800B datasheet(45/46 Pages) AMD

45 / 46 page

December 4, 2006 21519C4

Am29DL800B

D A TA

SH EE T

REVISION SUMMARY

Revision A (January 1998)

Initial release.

Revision A+1 (January 1998)

Reset Command

Deleted last paragraph in section, which applied to RESET#,

not the reset command.

Revision A+2 (Febrauary 1998)

Hardware Reset (RESET#)

Added note to table, fixed references to note.

Revision A+3 (April 1998)

Global

Removed references to the 80 ns speed option.

Changed the 70R ns (VCC ± 5%) speed option to the

70 ns (VCC ± 10%) speed option.

Figure 2, In-System Sector Protect/Unprotect

Algorithms

In the sector protect algorithm, added a “Reset

PLSCNT=1” box in the path from “Protect another sec-

tor?” back to setting up the next sector address.

DQ6: Toggle Bit I

In the first and second paragraphs, clarified that the

toggle bit may be read “at any address within the pro-

gramming or erasing bank,” not “at any address.” In the

fourth paragraph, clarified “device” to “bank.”

DC Characteristics

Added reference to Note 4 on ICC6 and ICC7 specifications.

AC Characteristics

Erase/Program Operations; Alternate CE# Controlled

Er a s e/ Pr og r a m Ope r ation s : Co rre cted the

notes reference for tWHWH1 and tWHWH2. These param-

eters are 100% tested. Corrected the note reference for

tVCS. This parameter is not 100% tested.

Temporary Sector Unprotect Table

Added note reference for tVIDR. This parameter is not

100% tested.

Figure 24, Sector Protect/Unprotect Timing

Diagram

A valid address is not required for the first write cycle;

only the data 60h.

Erase and Programming Performance

In Note 2, the worst case endurance is now 1 million cycles.

Revision A+4 (August 1998)

Ordering Information

Corrected description for E and F package type desig-

nators to 48-pin TSOP.

AC Characteristics

Read Operations: Corrected tRC, tACC, tCE for 90 ns

speed option.

Figure 24, Sector Protection/Unprotection Timing

Diagram

Changed timing parameters to match those in Figure 2.

Revision B (January 1999)

Connection Diagrams

Changed FBGA drawing to top view.

Ordering Information

Changed FBGA package reference to FBB048. Added

FBGA package markings to valid combinations table.

Revision B+1 (February 1999)

Physical Dimensions

Corrected ball grid layout on FBB048.

Revision B+2 (July 2, 1999)

Test Conditions

Test Specifications table: Corrected to indicate that the

70 ns speed is tested at 30 pF loading.

Revision C (December 7, 1999)

AC Characteristics—Figure 17. Program

Operations Timing and Figure 18. Chip/Sector

Erase Operations

Deleted tGHWL and changed OE# waveform to start at

high.

Physical Dimensions

Replaced figures with more detailed illustrations.

Revision C+1 (November 21, 2000)

Global

Added table of contents.

Ordering Information

Deleted burn-in option.

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