November 3, 2006 22371C7

Am29BL802C

41

D A TA

SH EET

ERASE AND PROGRAMMING PERFORMANCE

Notes:

1. Typical program and erase times assume the following conditions: 25

programming typicals assume checkerboard pattern.

3. The typical chip programming time is considerably less than the maximum chip programming time listed.

4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.

5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See

Table 4 for further information on command definitions.

6. The device has a minimum erase and program cycle endurance of 1 million cycles.

LATCHUP CHARACTERISTICS

SSOP PIN CAPACITANCE

Notes:

1. Sampled, not 100% tested.

DATA RETENTION

* For reference only. BSC is an ANSI standard for Basic Space Centering.

Parameter

Typ (Note 1)

Max (Note 2)

Unit

Comments

Sector Erase Time

5

15

s

Excludes 00h programming

prior to erasure (Note 4)

Chip Erase Time

45

s

Word Programming Time

9

360

µs

Excludes system level

overhead (Note 5)

Chip Programming Time (Note 3)

9

27

s

Description

Min

Max

(including A9, OE#, and RESET#)

–1.0 V

12.5 V

–1.0 V

–100 mA

+100 mA

Parameter

Symbol

Parameter Description

Test Setup

Typ

Max

Unit

Input Capacitance

6

7.5

pF

Output Capacitance

8.5

12

pF

Control Pin Capacitance

7.5

9

pF

Parameter

Test Conditions

Min

Unit

Minimum Pattern Data Retention Time

150

°C10

Years

125

°C20

Years