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M41000000G 数据表(PDF) 9 Page - Advanced Micro Devices

部件名 M41000000G
功能描述  64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 8 Mbit (1 M x 8-Bit/512 K x 16-Bit) Static RAM
PDF  63 Pages
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制造商  AMD [Advanced Micro Devices]
网页  http://www.amd.com
标志 AMD - Advanced Micro Devices

M41000000G 数据表(HTML) 9 Page - Advanced Micro Devices

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8
Am41DL6408G
August 19, 2002
P R E L I M INARY
PIN DESCRIPTION
A18–A0
= 19 Address Inputs (Common)
A21–A19, A-1 = 4 Address Inputs (Flash)
SA
= Highest Order Address Pin (SRAM)
Byte mode
DQ15–DQ0
= 16 Data Inputs/Outputs (Common)
CE#f
= Chip Enable (Flash)
CE#s
= Chip Enable (SRAM)
OE#
= Output Enable (Common)
WE#
= Write Enable (Common)
RY/BY#
= Ready/Busy Output
UB#s
= Upper Byte Control (SRAM)
LB#s
= Lower Byte Control (SRAM)
CIOf
= I/O Configuration (Flash)
CIOf = VIH = Word mode (x16),
CIOf = VIL = Byte mode (x8)
CIOs
= I/O Configuration (SRAM)
CIOs = VIH = Word mode (x16),
CIOs = VIL = Byte mode (x8)
RESET#
= Hardware Reset Pin, Active Low
WP#/ACC
= Hardware Write Protect/
Acceleration Pin (Flash)
VCCf
= Flash 3.0 volt-only single power sup-
ply (see Product Selector Guide for
speed options and voltage supply
tolerances)
VCCs
= SRAM Power Supply
VSS
= Device Ground (Common)
NC
= Pin Not Connected Internally
LOGIC SYMBOL
19
16 or 8
DQ15–DQ0
A18–A0
CE#f
OE#
WE#
RESET#
UB#s
RY/BY#
WP#/ACC
SA
A21–A19, A-1
LB#s
CIOf
CIOs
CE1#s
CE2s



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