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AM29PDL127H 数据表(PDF) 35 Page - Advanced Micro Devices

部件名 AM29PDL127H
功能描述  128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Page Mode Simultaneous Read/Write Flash Memory with Enhanced VersatileIOTM Control
PDF  68 Pages
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制造商  AMD [Advanced Micro Devices]
网页  http://www.amd.com
标志 AMD - Advanced Micro Devices

AM29PDL127H 数据表(HTML) 35 Page - Advanced Micro Devices

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June 07, 2005
Am29PDL127H
33
P RE L I M I NARY
Table 9.
CFI Query Identification String
Table 10.
System Interface String
Addresses
Data
Description
10h
11h
12h
0051h
0052h
0059h
Query Unique ASCII string “QRY”
13h
14h
0002h
0000h
Primary OEM Command Set
15h
16h
0040h
0000h
Address for Primary Extended Table
17h
18h
0000h
0000h
Alternate OEM Command Set (00h = none exists)
19h
1Ah
0000h
0000h
Address for Alternate OEM Extended Table (00h = none exists)
Addresses
Data
Description
1Bh
0027h
VCC Min. (write/erase)
D7–D4: volt, D3–D0: 100 millivolt
1Ch
0036h
VCC Max. (write/erase)
D7–D4: volt, D3–D0: 100 millivolt
1Dh
0000h
VPP Min. voltage (00h = no VPP pin present)
1Eh
0000h
VPP Max. voltage (00h = no VPP pin present)
1Fh
0004h
Typical timeout per single byte/word write 2N µs
20h
0000h
Typical timeout for Min. size buffer write 2N
µs (00h = not supported)
21h
0009h
Typical timeout per individual block erase 2N ms
22h
0000h
Typical timeout for full chip erase 2N ms (00h = not supported)
23h
0005h
Max. timeout for byte/word write 2N times typical
24h
0000h
Max. timeout for buffer write 2N times typical
25h
0004h
Max. timeout per individual block erase 2N times typical
26h
0000h
Max. timeout for full chip erase 2N times typical (00h = not supported)



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