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PCF8577CU/10 数据表(PDF) 9 Page - NXP Semiconductors |
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PCF8577CU/10 数据表(HTML) 9 Page - NXP Semiconductors |
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9 / 28 page ![]() 1998 Jul 30 9 Philips Semiconductors Product specification LCD direct/duplex driver with I2C-bus interface PCF8577C 6.10 Display memory mapping The mapping between the eight segment registers and the segment outputs S1 to S32 is given in Tables 1 and 2. Since only one register bit per segment is needed in the direct drive mode, the BANK bit allows swapping of display information. If BANK is set to logic 0 even bytes (BANK A) are displayed; if BANK is set to logic 1 odd bytes (BANK B) are displayed. BP1 is always used for the backplane output in the direct drive mode. In duplex mode even bytes (BANK A) correspond to backplane 1 (BP1) and odd bytes (BANK B) correspond to backplane 2 (BP2). Table 1 Segment byte-segment driver mapping in direct drive mode Mapping example: bit 0 of register 7 controls the LCD segment S25 if BANK bit is a logic 1. Table 2 Segment byte-segment driver mapping in duplex mode Note 1. Where X = don’t care. Mapping example: bit 7 of register 5 controls the LCD segment S24/BP2. MODE BANK V 2 V 1 V 0 SEGMENT/ BIT/ REGISTER MSB 7 654321 LSB 0 BACK- PLANE 0 0 0 0 0 0 S8 S7 S6 S5 S4 S3 S2 S1 BP1 0 1 0 0 1 1 S8 S7 S6 S5 S4 S3 S2 S1 BP1 0 0 0 1 0 2 S16 S15 S14 S13 S12 S11 S10 S9 BP1 0 1 0 1 1 3 S16 S15 S14 S13 S12 S11 S10 S9 BP1 0 0 1 0 0 4 S24 S23 S22 S21 S20 S19 S18 S17 BP1 0 1 1 0 1 5 S24 S23 S22 S21 S20 S19 S18 S17 BP1 0 0 1 1 0 6 S32 S31 S30 S29 S28 S27 S26 S25 BP1 0 1 1 1 1 7 S32 S31 S30 S29 S28 S27 S26 S25 BP1 MODE BANK(1) V 2 V 1 V 0 SEGMENT/ BIT/ REGISTER MSB 7 654321 LSB 0 BACK- PLANE 1 X 0 0 0 0 S8S7S6S5S4S3S2S1 BP1 1 X 0 0 1 1 S8S7S6S5S4S3S2S1 BP2 1 X 0 1 0 2 S16 S15 S14 S13 S12 S11 S10 S9 BP1 1 X 0 1 1 3 S16 S15 S14 S13 S12 S11 S10 S9 BP2 1 X 1 0 0 4 S24 S23 S22 S21 S20 S19 S18 S17 BP1 1 X 1 0 1 5 S24 S23 S22 S21 S20 S19 S18 S17 BP2 1 X 1 1 0 6 S32 S31 S30 S29 S28 S27 S26 S25 BP1 1 X 1 1 1 7 S32 S31 S30 S29 S28 S27 S26 S25 BP2 |
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