AS7261N datasheet(9/43 Pages) OSRAM

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Page 8

ams Datasheet

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[v1-02] 2017-Feb-27

AS7261N − Timing Characteristics

Figure 7:

AS7261N I²C Slave Timing Characteristics

Figure 8:

I²C Slave Timing Diagram

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

I²C Interface

fSCLK

SCL Clock Frequency

400

kHz

tBUF

Bus Free Time Between a STOP

and START

1.3

μs

tHS:STA

Hold Time (Repeated) START

0.6

μs

tLOW

LOW Period of SCL Clock

1.3

μs

tHIGH

HIGH Period of SCL Clock

0.6

μs

tSU:STA

Setup Time for a Repeated START

0.6

μs

tHS:DAT

Data Hold Time

0.9

μs

tSU:DAT

Data Setup Time

100

Rise Time of Both SDA and SCL

300

Fall Time of Both SDA and SCL

300

tSU:STO

Setup Time for STOP Condition

0.6

μs

Capacitive Load for Each Bus Line

CB — total capacitance

of one bus line in pF

400

CI/O

I/O Capacitance (SDA, SCL)

Timing Characteristics

SCL

SDA

tSU:STA

tLOW

tHIGH

tHD:STA

tSU:STO

tSU:DAT

tHD:DAT

tBUF

VIH

VIL

Stop

Start

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