AS7261N datasheet(26/43 Pages) OSRAM

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ams Datasheet

Page 25

[v1-02] 2017-Feb-27

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AS7261N − Detailed Descriptions

Figure 30:

Bank Register

Figure 31:

Sensor Gain and LED_DRV Current Drive Register

Figure 32:

Integration Time Register

Addr: 0xDB

BANK

Bit

Bit Name

Default

Access

Bit Description

BANK

R/W

Sets Bank mode for sensor channel selection:

0= Mode 0 for X, Y, D and D sensor data

1= Mode 1 for X, Y, Z and NIR sensor data

6:0

RESV

R/W

Reserved, set to 0000000 if writing the register

Addr: 0xB9

GAIN_IDRV

Bit

Bit Name

Default

Access

Bit Description

7:6

IDRV

R/W

For LED_DRV pin current limit (when on).

Set to:

‘b00=100mA; ‘b01=50mA; ‘b10=25mA; ‘b11=12.5mA;

5:2

RESV

R/W

Reserved, set to 0000 if writing the register

1:0

GAIN

R/W

Sensor Channel Gain Setting (all channels)

‘b00=1x; ‘b01=3.7x; ‘b10=16x; ‘b11=64x;

Addr: 0xD9

INT_T

Bit

Bit Name

Default

Access

Bit Description

7:0

INT_T

0xFF

R/W

Sets sensor integration time

Integration time = (256 - value) * 2.8ms

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