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TSL2568CS 数据表(PDF) 19 Page - OSRAM GmbH |
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TSL2568CS 数据表(HTML) 19 Page - OSRAM GmbH |
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19 / 56 page  Page 18 ams Datasheet Document Feedback [v1-00] 2016-Apr-12 TSL2568, TSL2569 − Principles of Operation • Combined format (SMBus and I²C): • During a change of direction within a transfer, the master repeats both a START condition and the slave address but with the R/W bit reversed. In this case, the master receiver terminates the transfer by generating a NACK on the last byte of the transfer and a STOP condition. For a complete description of SMBus protocols, please review the SMBus Specification at www.smbus.org/specs. For a complete description of I²C protocols, please review the I²C Specification at www.nxp.com. Figure 18: SMBus and I²C Packet Protocol Element Key S Slave Address Wr A Data Byte A P Master-to-Slave Slave-to-Master … Continuation of protocol X Shown under a field indicates that that field is required to have a value of X Wr Write (bit value of 0) Sr Repeated Start Condition S Start Condition Rd Read (bit value of 1) P Stop Condition A Acknowledge (this bit position may be 0 for an ACK or 1 for a NACK) 11 1 1 1 78 XX |
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