Page 20

ams Datasheet

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[v1-01] 2018-Mar-27

TSL2571 − Register Description

Enable Register (0x00)

The ENABLE register is used to power the device ON/OFF, enable

functions, and interrupts.

Figure 22:

Enable Register

Note(s):

1. A minimum interval of 2.72 ms must pass after PON is asserted before ALS can be initiated. This required time is enforced by the

hardware in cases where the firmware does not provide it.

Field

Bits

Description

Reserved

7:5

Reserved. Write as 0.

AIEN

4

ALS interrupt mask. When asserted, permits ALS interrupts to be generated.

WEN

3

Wait enable. This bit activates the wait feature. Writing a 1 activates the wait timer.

Writing a 0 disables the wait timer.

Reserved

2

Reserved. Write as 0.

AEN

1

ALS Enable. Writing a 1 activates the ALS. Writing a 0 disables the ALS.

PON (1)

0

Power ON. This bit activates the internal oscillator to permit the timers and ADC

channels to operate. Writing a 1 activates the oscillator. Writing a 0 disables the

oscillator.

6

75

4

PON

2

31

0

ENABLE

Reserved

AIEN

Address

0x00

AEN

WEN

Reserved