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SSM2306CPZ-R2 数据表(PDF) 1 Page - Analog Devices

部件名 SSM2306CPZ-R2
功能描述  2 W, Filterless, Class-D Stereo Audio Amplifier
PDF  16 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

SSM2306CPZ-R2 数据表(HTML) 1 Page - Analog Devices

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2 W, Filterless, Class-D
Stereo Audio Amplifier
SSM2306
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2007 Analog Devices, Inc. All rights reserved.
FEATURES
Filterless Class-D amplifier with built-in output stage
2 W into 4 Ω and 1.4 W into 8 Ω at 5.0 V supply
Ultralow idle current with load resistance
>87% efficiency at 5.0 V, 1.4 W into 8 Ω speaker
Better than 96 dB SNR (signal-to-noise ratio)
Available in 16-lead, 3 mm × 3 mm LFCSP
Single-supply operation from 2.5 V to 5.0 V
20 nA ultralow shutdown current
Short-circuit and thermal protection
Pop-and-click suppression
Built-in resistors reduce board component count
Default fixed 18 dB gain and user-adjustable
APPLICATIONS
Mobile phones
MP3 players
Portable gaming
Portable electronics
Educational toys
Notebook computers
GENERAL DESCRIPTION
The SSM2306 is a fully integrated, high efficiency, Class-D stereo
audio amplifier designed to maximize performance for portable
applications. The application circuit requires minimum external
components and operates from a single 2.5 V to 5.0 V supply. It
is capable of delivering 2 W of continuous output power with less
than 10% THD + N driving a 4 Ω load from a 5.0 V supply.
The SSM2306 features ultralow idle current, high efficiency, and
a low noise modulation scheme. It operates with >87% efficiency
at 1.4 W into 8 Ω from a 5.0 V supply and has a signal-to-noise
ratio (SNR) that is better than 96 dB. PDM modulation offers lower
EMI radiated emissions compared to other Class-D architectures.
The SSM2306 has a micropower shutdown mode with a typical
shutdown current of 20 nA. Shutdown is enabled by applying a
logic low to the SD pin.
The architecture of the device allows it to achieve a very low level
of pop and click to minimize voltage glitches at the output
during turn-on and turn-off, thereby reducing audible noise on
activation and deactivation. The fully differential input of the
SSM2306 provides excellent rejection of common-mode noise
on the input. Input coupling capacitors can be omitted if the dc
input common-mode voltage is approximately VDD/2.
The SSM2306 also has excellent rejection of power supply noise,
including noise caused by GSM transmission bursts and RF
rectification.
The SSM2306 has a preset gain of 18 dB that can be reduced by
using external resistors.
The SSM2306 is specified over the commercial temperature range
(−40°C to +85°C). It has built-in thermal shutdown and output
short-circuit protection. It is available in a 16-lead, 3 mm × 3 mm
lead frame chip scale package (LFCSP).
FUNCTIONAL BLOCK DIAGRAM
FET
DRIVER
MODULATOR
0.1µF
VDD
VDD
INTERNAL
OSCILLATOR
OUTR+
OUTR–
OUTL+
OUTL–
BIAS
FET
DRIVER
MODULATOR
INR+
VBATT
2.5V TO 5.0V
INR–
SHUTDOWN
INL+
INL–
GND
GND
10µF
22nF1
1 INPUT CAPS ARE OPTIONAL IF INPUT DC COMMON-MODE
VOLTAGE IS APPROXIMATELY VDD/2.
22nF1
344kΩ
344kΩ
GAIN = 344kΩ/(43kΩ + REXT)
43kΩ
43kΩ
43kΩ
43kΩ
REXT
REXT
REXT
REXT
344kΩ
344kΩ
22nF1
22nF1
SD
LEFT IN+
LEFT IN–
RIGHT IN–
RIGHT IN+
SSM2306
Figure 1.


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