 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
DSP56366 数据表(PDF) 88 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
DSP56366 数据表(HTML) 88 Page - Freescale Semiconductor, Inc |
|
|
88 / 110 page  DSP56366 Technical Data, Rev. 3.1 3-62 Freescale Semiconductor Figure 3-39 Test Clock Input Timing Diagram Figure 3-40 Boundary Scan (JTAG) Timing Diagram 509 TMS, TDI data hold time 25.0 — ns 510 TCK low to TDO data valid 0.0 44.0 ns 511 TCK low to TDO high impedance 0.0 44.0 ns Notes: 1. 4. 1 V CC = 3.3 V ± 0.16 V; TJ = –40°C to +110°C, CL = 50 pF 2 All timings apply to OnCE module data transfers because it uses the JTAG port as an interface. Table 3-26 JTAG Timing1, 2 (continued) No. Characteristics All frequencies Unit Min Max TCK (Input) VM VM VIH VIL 501 502 502 503 503 AA0496 TCK (Input) Data Inputs Data Outputs Data Outputs Data Outputs VIH VIL Input Data Valid Output Data Valid Output Data Valid 505 504 506 507 506 AA0497 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
