SN74LVC10A Triple 3-Input Positive-NAND Gate

1 Features

• Operates from 1.65V to 3.6V

• Specified from –40°C to 85°C and

–40°C to 125°C

• Inputs accept voltages to 5.5V

• Max tpd of 4.9ns at 3.3V

• Typical VOLP (output ground bounce)

< 0.8V at VCC = 3.3V, TA = 25°C

• Typical VOHV (output VOH undershoot)

> 2V at VCC = 3.3V, TA = 25°C

• Latch-up performance exceeds 250 mA per JESD

17

• ESD protection exceeds JESD 22

– 2000V human-body model (A114-A)

2 Description

This triple 3-input positive-NAND gate is designed for

1.65V to 3.6V VCC operation.

Package Information

PART NUMBER

PACKAGE SIZE(1)

PACKAGE SIZE(2)

BODY SIZE(3)

SN74LVC10A

BQA (WQFN, 14)

3mm × 2.5mm

3mm × 2.5mm

D (SOIC, 14)

8.65mm × 6mm

8.65mm × 3.9mm

DB (SSOP, 14)

6.2mm × 7.8mm

6.2mm × 5.3mm

NS (SOP, 14)

10.2mm × 7.8mm

10.3mm × 5.3mm

PW (TSSOP, 14)

5mm × 6.4mm

5mm × 4.4mm

RGY (VQFN, 14)

3.5mm × 3.5mm

3.5mm × 3.5mm

(1)

For more information, see Section 10.

(2)

The package size (length × width) is a nominal value and

includes pins, where applicable.

(3)

The body size (length × width) is a nominal value and does

not include pins.

Y

A

B

C

Logic Diagram, Each Gate (Positive Logic)

SN74LVC10A

SCAS284P – JANUARY 1993 – REVISED MAY 2024

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.