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MPC8280VRI 数据表(PDF) 23 Page - Freescale Semiconductor, Inc |
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MPC8280VRI 数据表(HTML) 23 Page - Freescale Semiconductor, Inc |
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23 / 80 page ![]() MPC8280 PowerQUICC II™ Family Hardware Specifications, Rev. 1.7 Freescale Semiconductor 23 AC Electrical Characteristics Figure 12 is a representation of the information in Table 13. Figure 12. Internal Tick Spacing for Memory Controller Signals NOTE The UPM machine outputs change on the internal tick determined by the memory controller programming; the AC specifications are relative to the internal tick. Note that SDRAM and GPCM machine outputs change on CLKin’s rising edge. 6.3 JTAG Timings Table 14 lists the JTAG timings. Table 13. Tick Spacing for Memory Controller Signals PLL Clock Ratio Tick Spacing (T1 Occurs at the Rising Edge of CLKin) T2 T3 T4 1:2, 1:3, 1:4, 1:5, 1:6 1/4 CLKin 1/2 CLKin 3/4 CLKin 1:2.5 3/10 CLKin 1/2 CLKin 8/10 CLKin 1:3.5 4/14 CLKin 1/2 CLKin 11/14 CLKin Table 14. JTAG Timings1 Parameter Symbol2 Min Max Unit Notes JTAG external clock frequency of operation fJTG 033.3 MHz JTAG external clock cycle time tJTG 30 — ns JTAG external clock pulse width measured at 1.4V tJTKHKL 15 — ns JTAG external clock rise and fall times tJTGR and tJTGF 05 ns 6 TRST assert time tTRST 25 — ns 3, 6 Input setup times Boundary-scan data TMS, TDI tJTDVKH tJTIVKH 4 4 — — ns ns 4, 7 4, 7 CLKin T1 T2 T3 T4 CLKin T1 T2 T3 T4 for 1:2.5 for 1:3.5 CLKin T1 T2 T3 T4 for 1:2, 1:3, 1:4, 1:5, 1:6 |
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