MPC8555VTAPF datasheet(50/88 Pages) FREESCALE

部件名	MPC8555VTAPF

功能描述	PowerQUICC??III Integrated Communications Processor Hardware Specifications

PDF	88 Pages

Scroll/Zoom	100%

制造商	FREESCALE [Freescale Semiconductor, Inc]

网页	http://www.freescale.com

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50 / 88 page

MPC8555E PowerQUICC™ III Integrated Communications Processor Hardware Specifications, Rev. 4

Freescale Semiconductor

JTAG

Figure 31 provides the AC test load for TDO and the boundary-scan outputs of the MPC8555E.

Figure 31. AC Test Load for the JTAG Interface

Figure 32 provides the JTAG clock input timing diagram.

Figure 32. JTAG Clock Input Timing Diagram

Figure 33 provides the TRST timing diagram.

Figure 33. TRST Timing Diagram

Figure 34 provides the boundary-scan timing diagram.

Figure 34. Boundary-Scan Timing Diagram

Output

Z0 = 50 Ω

OVDD/2

RL = 50 Ω

JTAG

tJTKHKL

tJTGR

External Clock

tJTG

tJTGF

VM = Midpoint Voltage (OVDD/2)

TRST

VM = Midpoint Voltage (OVDD/2)

tTRST

VM = Midpoint Voltage (OVDD/2)

tJTDVKH

tJTDXKH

Boundary

Data Outputs

Boundary

Data Outputs

JTAG

External Clock

Boundary

Data Inputs

Output Data Valid

tJTKLDX

tJTKLDZ

tJTKLDV

Input

Data Valid

Output Data Valid

MPC8555VTAPF 数据表(PDF) 50 Page - Freescale Semiconductor, Inc

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