- 35 -
© Andigilog, Inc. 2006
www.andigilog.com
October 2006 - 70A06010
aSC7621
When read, the Current PWM Duty registers return the current PWM duty cycle. These registers are read-only unless the
fan is in manual (test) mode, in which case a write to these registers will directly control the PWM duty cycle for each fan.
The PWM duty cycle is represented as shown in Table 19.
If a 3-wire fan is being used and the option to enable 3-wire tach measurement is selected, the effective PWM duty cycle will
be impacted by this feature. The 3-wire Enable setting will hold the PWM signal high for the period taken to make a
tachometer reading. This period depends on the RPM and various tachometer measurement parameters. Overall impact is
that lower PWM commands will be effectively increased and there may be acoustic effects.
Register Value
Current PWM %
Binary
Hex
0%
0000
0000
00
~25%
0100
0000
40
~50% (Default)
1000
0000
80
~75%
1100
0000
C0
100%
1111
1111
FF
Table 19 Current PWM Duty Cycle Setting
Register 4E-53h and 39h-3Ah: Temperature Zone Limit Registers
Register
Address
Read/
Write
Register Name
Bit 7
(MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
Default
Value
4Eh
R/W
Zone 1 Low
Temperature
7
6
5
4
3
2
1
0
81
4Fh
R/W
Zone 1 High
Temperature
7
6
5
4
3
2
1
0
7F
50h
R/W
Zone 2 Low
Temperature
7
6
5
4
3
2
1
0
81
51h
R/W
Zone 2 High
Temperature
7
6
5
4
3
2
1
0
7F
52h
R/W
Zone 3 Low
Temperature
7
6
5
4
3
2
1
0
81
53h
R/W
Zone 3 High
Temperature
7
6
5
4
3
2
1
0
7F
34h
R/W
Zone 4 Low
Temperature
7
6
5
4
3
2
1
0
81
3Ah
R/W
Zone 4 High
Temperature
7
6
5
4
3
2
1
0
00
If an external temperature input or the internal temperature sensor either exceeds the value set in the corresponding high
limit register or falls below the value set in the corresponding low limit register, the corresponding bit will be set automatically
by the aSC7621 in the Interrupt Status Register 1 (41h). For example, if the temperature read from the Remote - and
Remote + inputs exceeds the Zone 1 High Temp register limit setting, Interrupt Status Register 1 ZN1 bit will be set. The
temperature limits in these registers are represented as 8 bit 2’s complement, signed numbers in Celsius, as shown below in
Table 20. Setting the Ready/Lock/Start/Override register Lock bit has no effect on these registers.
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