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© Andigilog, Inc. 2006
www.andigilog.com
October 2006 - 70A06010
aSC7621
Register 6Fh: Test Register
Register
Address
Read/
Write
Register
Name
Bit 7
(MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
Default
Value
Lock
6Fh
R/W
Test Register
RES
RES
RES
RES
RES
RES
RES
XEN
00h
X
XOR Tree Test
The aSC7621 incorporates a XOR tree test mode. When the test mode is enabled by setting the “XEN” bit high in the Test
Register at address 6Fh via the SMBus, the part will enter XOR test mode.
Since the test mode an XOR tree, the order of the signals in the tree is not important. SMBDAT and SMBCLK are not
included in the test tree. Connections to the XOR tree are shown in Figure 12.
This register becomes Read-Only when the Ready/Lock/Start/Override register Lock bit is set. Any further attempts to write
to this registers shall have no effect.
Figure 12 XOR Test Tree
Register 70-7Fh: Vendor Specific Registers
These registers are for vendor specific features, including test registers. They will not default to a specific value on power
up.
TACH1
TACH2
TACH3
TACH4
PWM2
PWM3
XTESTOUT
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