| 数据搜索系统,热门电子元器件搜索 |
|
MP8042DF 数据表(PDF) 3 Page - Monolithic Power Systems |
|
|
|||||||||||||||||||||||||||||
MP8042DF 数据表(HTML) 3 Page - Monolithic Power Systems |
|
3 / 9 page ![]() MP8042 – HIGH CURRENT, DUAL CHANNEL POWER HALF-BRIDGE INITIAL RELEASE – SPECIFICATIONS SUBJECT TO CHANGE MP8042 Rev. 0.9 www.MonolithicPower.com 3 5/23/2006 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2006 MPS. All Rights Reserved. TM ELECTRICAL CHARACTERISTICS (continued) VDD1 = VDD2 = 12V, SHDN V = 5V, TA = +25°C, unless otherwise specified. Parameters Symbol Condition Min Typ Max Units OUT Switching Frequency VPWM = 0 to 2V, 50% Duty Cycle 0.6 MHz OUT Maximum Duty Cycle (5) VDD = 7.5V, VPWM = 2V, CBST = 100nF, fSW = 3.3KHz 99.5 % OUT Rise/Fall Time (4) VPWM = 0V to 5V 10 ns PWM Pulse Width VPWM = 0V to 2V, High or Low Pulse 200 ns Dead Time (4) IOUT= ±100mA 30 ns PWM to OUT Delay Time Rising VPWM = 0V to 5V 37 45 ns PWM to OUT Delay Time Falling VPWM = 5 to 0V 54 65 ns Thermal Shutdown Temperature (4) TJ Rising, Hysteresis = 20°C 150 °C Notes: 4) Guaranteed by design, not production tested. 5) OUT drives low for 1.5µs every 300µs to charge the BST to SW capacitor. |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |