ESDAxxSCx

3/10

®

1. CALCULATION OF THE CLAMPING VOLTAGE USE OF THE DYNAMIC RESISTANCE

The ESDA family has been designed to clamp fast spikes like ESD. Generally the PCB designers need to

classical parameters. The voltage across the protection cell can be calculated with the following formula:

As the value of the dynamic resistance remains stable for a surge duration lower than 20ms, the 2.5ms

rectangular surge is well adapted. In addition both rise and fall times are optimized to avoid any parasitic

2. DYNAMIC RESISTANCE MEASUREMENT

The short duration of the ESD has led us to prefer a more adapted test wave, as below defined, to the

classical 8/20µs and 10/1000µs surges.

Figure 3: 2.5µs duration measurement wave

Figure 4: Peak power dissipation versus initial

junction temperature

Figure 5: Peak pulse power versus exponential

2µs

tp = 2.5µs

t

I

Ipp

0

25

50

75

100

125

150

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

1.1

P

[T initial] /

[T initial=25°C]

PP

j

j

T initial (°C)

j

110

100

100

1000

5000

ESDA14V2SC5/SC6

ESDA17SC6

ESDA19SC6

ESDA25SC6

ESDA5V3SC5/SC6

&

ESDA6V1SC5/SC6

t (µs)

p

P

(W)

PP