ESDAXXSCX datasheet(5/10 Pages) STMICROELECTRONICS

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ESDAxxSCx

5/10

Figure 10: ESDAxxSCx array protection against ESD

The ESDAxxSCx array is the ideal board level protection of ESD sensitive semiconductor components.

The tiny SOT23-5L and SOT23-6L packages allow design flexibility in the high density boards where the

space saving is at a premium. This enables to shorten the routing and contributes to hardening against

ESD.

4. ADVICE FOR OPTIMIZING CIRCUIT BOARD LAYOUT

Circuit board layout is a critical design step in the suppression of ESD induced transients. The following

guidelines are recommended:

■ The ESDAxxSC5/6 should be placed as close as possible to the input terminals or connectors.

■ The path length between the ESD suppressor and the protected line should be minimized

■ All conductive loops, including power and ground loops should be minimized

■ The ESD transient return path to ground should be kept as short as possible

■ Ground planes should be used whenever possible

5. TECHNICAL INFORMATION

ESD protection

The ESDA19SC6 is particularly optimized to perform ESD protection. ESD protection is achieved by

clamping the unwanted overvoltage. The clamping voltage is given by the following formula :

VCL = VBR + Rd

. I

As shown in figure 11, the ESD strikes are clamped by the transient voltage suppressor.

Figure 11: ESD clamping behavior (example)

ESD

sensitive

device

GND

ESDAxxxSC6 (1connection to GND for ESDAxxSC5)

I/ O LINES

ESD Surge

Voutput

Rload

VBR

Device

to be

protected

ESDA19SC6

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