TDA4841PS datasheet(42/60 Pages) PHILIPS

42 / 60 page

1999 Oct 25

Philips Semiconductors

Product speciﬁcation

I2C-bus autosync deﬂection controller for

PC monitors

TDA4841PS

Soft-start and soft-down sequences

Fig.23 Activation of PLL2 soft-start and soft-down sequences via the I2C-bus.

a. Soft-start sequence for VCC > 8.6 V.

b. Soft-down sequence for VCC > 8.6 V.

(1) Pins HDRV and BDRV are floating for VCC < 8.6 V.

handbook, full pagewidth

VHPLL2

continuous blanking off

PLL2 enabled

frequency detector enabled

HDRV/HFLB protection enabled

4.6 V

4.0 V

1.8 V

time

HDRV duty cycle begins to increase

1.0 V

VOUT1 and VOUT2 enabled

BDRV duty cycle begins to increase

HDRV duty cycle has reached nominal value

3.2 V

BDRV duty cycle has reached nominal value

MHB495

handbook, full pagewidth

VHPLL2

continuous blanking (pin 16 and 17) activated

PLL2 disabled

frequency detector disabled

HDRV/HFLB protection disabled

4.6 V

4.0 V

1.8 V

time

HDRV floating

1.0 V VOUT1 and VOUT2 floating

BDRV duty cycle begins to decrease(1)

2.8 V

BDRV floating

HDRV duty cycle begins to decrease(1)

MHB496

TDA4841PS 数据表(PDF) 42 Page - NXP Semiconductors

TDA4841PS 数据表(HTML) 42 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

数据表下载