TDA4841PS datasheet(21/60 Pages) PHILIPS

21 / 60 page

1999 Oct 25

Philips Semiconductors

Product speciﬁcation

I2C-bus autosync deﬂection controller for

PC monitors

TDA4841PS

ADJUSTMENT OF VERTICAL POSITION; see Figs 3 to 7

VOFFS

vertical position (referenced to

100% vertical size)

−−4

−

0.25

−

VPOS

vertical position (referenced to

100% vertical size)

−−11.5

−

11.5

−

0.09

−

ADJUSTMENT OF VERTICAL LINEARITY; see Figs 6 and 27

VLIN

vertical linearity (S-correction)

bit VSC = 0; note 8

−

bit VSC = 0; note 8

−

bit VSC = 1; note 8

−

δVLIN

symmetry error of S-correction

maximum VLIN

−−±0.7

ADJUSTMENT OF VERTICAL LINEARITY BALANCE; see Fig.7

VLINBAL

vertical linearity balance

(referenced to 100% vertical

size)

note 8

−1.85

−1.40

−0.95

note 8

0.95

1.40

1.85

note 8

−

0.08

−

VMOIRE

modulation of vertical picture

position by 1

⁄2 vertical

frequency (related to 100%

vertical size)

control bit MOD = 0

−

control bit MOD = 0

−

0.03

−

moire cancellation off

control bit MOD = 1

−

Vertical output stage: pin VOUT1 and VOUT2; see Fig.27

∆I

VOUT(nom)(p-p)

nominal differential output

current (peak-to-peak value)

∆IVOUT =IVOUT1 − IVOUT2;

nominal settings; note 8

0.76

0.85

0.94

Io(VOUT)(max)

maximum output current at

pins VOUT1 and VOUT2

control bit VOVSCN = 1

0.54

0.6

0.66

VVOUT

allowed voltage at outputs

−

4.2

E(offset)(max)(V)

maximum offset error of vertical

output currents

nominal settings; note 8

−−±2.5

LEV(max)

maximum linearity error of

vertical output currents

nominal settings; note 8

−−±1.5

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

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