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DS21109F-page 6

 2004 Microchip Technology Inc.

TABLE 11-3:

PIN ASSIGNMENTS IN THE PROGRAMMING MODE

DIP/SOIC

Pin

PLCC Pin

Name

I/O

Description

1

2

DATA

I/O

The rising edge of the clock shifts a data word in or out of the

EPROM one bit at a time.

2

4

CLK

I

Clock Input. Used to increment the internal address/word

counter for reading and programming operation.

3

6

RESET/OE

I

The rising edge of CLK shifts a data word into the EPROM

when CE and OE are HIGH; it shifts a data word out of the

EPROM when CE is LOW and OE is HIGH. The address/

word counter is incremented on the rising edge of CLK while

CE is held HIGH and OE is held LOW.

Note 1: Any modified polarity of the RESET/OE pin is

ignored in the programming mode.

48

CE

I

The rising edge of CLK shifts a data word into the EPROM

when CE and OE are HIGH; it shifts a data word out of the

EPROM when CE is LOW and OE is HIGH. The address/

word counter is incremented on the rising edge of CLK while

CE is held HIGH and OE is held LOW.

510

Ground pin.

614

CEO

O

The polarity of the RESET/OE pin can be read by sensing the

CEO pin.

Note 1: The polarity of the RESET/OE pin is ignored while in

the Programming Mode. In final verification, this pin

must be monitored to go LOW one clock cycle after

the last data bit has been read.

717

Programming Voltage Supply. Programming Mode is entered

ing clock edge. A word is programmed by strobing the device

normal read operation.

820

+5 V power supply input.