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24LCS52-/MCG 数据表(PDF) 1 Page - Microchip Technology |
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24LCS52-/MCG 数据表(HTML) 1 Page - Microchip Technology |
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1 / 28 page ![]() © 2005 Microchip Technology Inc. DS21166J-page 1 24AA52/24LCS52 Features: • Single supply with operation down to 1.8V • Low-power CMOS technology: - 1 mA active current, typical -1 μA standby current, typical (I-temp) • Organized as 1 block of 256 bytes (256 x 8) • Software write protection for lower 128 bytes • Hardware write protection for entire array • 2-wire serial interface bus, I2C™ compatible • Schmitt Trigger inputs for noise suppression • Output slope control to eliminate ground bounce • 100 kHz (24AA52) and 400 kHz (24LCS52) compatibility • Self-timed write cycle (including auto-erase) • Page write buffer for up to 16 bytes • ESD protection > 4,000V • 1,000,000 erase/write cycles • Data retention > 200 years • 8-lead PDIP, SOIC, TSSOP, MSOP and DFN packages • Pb-free finishes available • Available for extended temperature ranges: - Industrial (I): -40°C to +85°C Device Selection Table Package Types Description: The Microchip Technology Inc. 24AA52/24LCS52 (24XXX52*) is a 2 Kbit Electrically Erasable PROM capable of operation across a broad voltage range (1.8V to 5.5V). This device has a software write-protect feature for the lower half of the array, as well as an external pin that can be used to write-protect the entire array. The software write-protect feature is enabled by sending the device a special command. Once this feature has been enabled, it cannot be reversed. In addition to the software protect feature, there is a WP pin that can be used to write-protect the entire array, regardless of whether the software write-protect register has been written or not. This allows the system designer to protect none, half, or all of the array, depending on the application. The device is organized as one block of 256 x 8-bit memory with a 2-wire serial interface. Low-voltage design permits operation down to 1.8V, with standby and active currents of only 1 μA and 1 mA, respectively. The 24XXX52 also has a page write capability for up to 16 bytes of data. The 24XXX52 is available in the standard 8-pin PDIP, surface mount SOIC, TSSOP, MSOP and DFN packages. Block Diagram Part Number VCC Range Max Clock Frequency Temp Ranges 24AA52 1.8-5.5 400 kHz(1) I 24LCS52 2.2-5.5 400 kHz I Note 1: 100 kHz for VCC <2.2V A0 A1 A2 VSS 1 2 3 4 8 7 6 5 VCC WP SCL SDA PDIP/SOIC/TSSOP/MSOP/DFN A0 A1 A2 VSS WP SCL SDA VCC 8 7 6 5 1 2 3 4 I/O Control Logic Memory Control Logic XDEC HV Generator Standard Array Software write Write-Protect Circuitry YDEC VCC VSS Sense Amp. R/W Control SDA SCL A0 A1 A2 WP protected area (00h-7Fh) 2K 2.2V I2C™ Serial EEPROM with Software Write-Protect *24XXX52 is used in this document as a generic part number for the 24AA52/24LCS52 devices. |
类似零件编号 - 24LCS52-/MCG |
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类似说明 - 24LCS52-/MCG |
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