24LCS52-SLASHMCG datasheet(13/28 Pages) MICROCHIP

13 / 28 page

DS21166J-page 13

24AA52/24LCS52

8.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 8-1.

TABLE 8-1:

PIN FUNCTION TABLE

8.1

A0, A1, A2

The levels on these inputs are compared with the

corresponding bits in the slave address. The chip is

selected if the compare is true.

Up to eight 24XXX52 devices may be connected to the

same

bus

using

different

Chip

Select

bit

combinations. These inputs must be connected to

either VSS or VCC.

8.2

Serial Address/Data Input/Output

(SDA)

This is a bidirectional pin used to transfer addresses

and data into and data out of the device. It is an open

drain terminal. Therefore, the SDA bus requires a pull-

up resistor to VCC (typical 10 k

Ω for 100 kHz, 2 kΩ for

400 kHz).

For normal data transfer, SDA is allowed to change

only during SCL low. Changes during SCL high are

reserved for indicating the Start and Stop conditions.

8.3

Serial Clock (SCL)

This input is used to synchronize the data transfer to

and from the device.

8.4

Write-Protect (WP)

This is the hardware write-protect pin. It can be tied to

VCC or VSS. If tied to VCC, the hardware write protection

is enabled. If the WP pin is tied to VSS, the hardware

write protection is disabled.

Symbol

PDIP

SOIC

TSSOP

MSOP

DFN

Description

Chip Address Input

VSS

Ground

SDA

Serial Address/Data I/O

SCL

Serial Clock

Write-Protect Input

VCC

+1.8V to 5.5V Power Supply

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