AD8027ARTZ-R2 datasheet(7/27 Pages) AD

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Data Sheet

AD8027/AD8028

ABSOLUTE MAXIMUM RATINGS

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Rev. E | 7 of 27

Table 4.

Parameter

Rating

Supply Voltage

12.6 V

Power Dissipation

See Figure 3

Common-Mode Input Voltage

±VS ± 0.5 V

Differential Input Voltage

±1.8 V

Storage Temperature Range

−65°C to +125°C

Operating Temperature Range

−40°C to +125°C

Lead Temperature Range (Soldering 10 sec)

300°C

Junction Temperature

150°C

Stresses at or above those listed under Absolute Maximum Ratings

may cause permanent damage to the product. This is a stress

rating only; functional operation of the product at these or any other

conditions above those indicated in the operational section of this

specification is not implied. Operation beyond the maximum operat-

ing conditions for extended periods may affect product reliability.

MAXIMUM POWER DISSIPATION

The maximum safe power dissipation in the AD8027/AD8028 pack-

age is limited by the associated rise in junction temperature (TJ)

on the die. The plastic encapsulating the die locally reaches the

junction temperature. At approximately 150°C, which is the glass

transition temperature, the plastic changes its properties. Even tem-

porarily exceeding this temperature limit may change the stresses

that the package exerts on the die, permanently shifting the para-

metric performance of the AD8027/AD8028. Exceeding a junction

temperature of 175°C for an extended period of time can result in

changes in the silicon devices, potentially causing failure.

The still air thermal properties of the package and PCB (θJA),

ambient temperature (TA), and the total power dissipated in the

package (PD) determine the junction temperature of the die. The

junction temperature can be calculated as

TJ=TA+ PD×θJA

(1)

The power dissipated in the package (PD) is the sum of the quies-

cent power dissipation and the power dissipated in the package due

to the load drive for all outputs. The quiescent power is the voltage

between the supply pins (VS) times the quiescent current (IS).

Assuming the load (RL) is referenced to midsupply, the total drive

power is VS/2 × IOUT, some of which is dissipated in the package

and some in the load (VOUT × IOUT). The difference between the

total drive power and the load power is the drive power dissipated

in the package.

PD = Quiescent Power + (Total Drive Power − Load Power)

PD= VS×IS + VS2×VOUTRL −VOUT2RL (2)

It is recommended that rms output voltages be considered. If RL

is referenced to –VS, as in single-supply operation, the total drive

power is VS × IOUT.

If the rms signal levels are indeterminate, consider the worst case,

when VOUT = VS/4 for RL to midsupply.

PD= VS×IS + VS/42RL

(3)

In single-supply operation with RL referenced to –VS, worst case is

VOUT = VS/2.

Airflow increases heat dissipation, effectively reducing θJA. Also,

more metal directly in contact with the package leads from metal

traces, through holes, ground, and power planes reduces the θJA.

Care must be taken to minimize parasitic capacitances at the input

leads of high speed op amps, as described in the PCB Layout

section.

Figure 3 shows the maximum safe power dissipation in the package

vs. the ambient temperature for the 8-lead SOIC (125°C/W), 6-lead

SOT-23 (170°C/W), and 10-lead MSOP (130°C/W) packages on a

JEDEC standard 4-layer board.

OUTPUT SHORT CIRCUIT

Shorting the output to ground or drawing excessive current from the

AD8027/AD8028 can cause catastrophic failure.

Figure 3. Maximum Power Dissipation vs. Ambient Temperature

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Charged devi-

ces and circuit boards can discharge without detection. Although

this product features patented or proprietary protection circuitry,

damage may occur on devices subjected to high energy ESD.

Therefore, proper ESD precautions should be taken to avoid

performance degradation or loss of functionality.

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