AD8351

Data Sheet

Rev. D | Page 6 of 19

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

Figure 2. 10-Lead MSOP Pin Configuration

Figure 3. 16-Lead LFCSP Pin Configuration

Table 3. Pin Function Descriptions

Pin No.

Mnemonic

Description

10-Lead MSOP

16-Lead LFCSP

1

16

PWUP

Apply a positive voltage (1.3 V ≤ VPWUP ≤ VPOS) to activate device.

2

1

RGP1

Gain Resistor Input 1.

3

2

INHI

Balanced Differential Input. Biased to midsupply, typically ac-coupled.

4

3

INLO

Balanced Differential Input. Biased to midsupply, typically ac-coupled.

5

4

RGP2

Gain Resistor Input 2.

6

9

COMM

Device Common. Connect to low impedance ground.

7

10

OPLO

Balanced Differential Output. Biased to VOCM, typically ac-coupled.

8

11

OPHI

Balanced Differential Output. Biased to VOCM, typically ac-coupled.

9

12

VPOS

Positive Supply Voltage. 3 V to 5.5 V.

10

13

VOCM

Voltage applied to this pin sets the common-mode voltage at both the input and

output. Typically decoupled to ground with a 0.1 μF capacitor.

5, 6, 7, 8, 14, 15

NC

No connect. Do not connect to this pin.

EPAD

Exposed Pad. The exposed pad is internally connected to GND and must be soldered

to a low impedance ground plane.

PWUP 1

RGP1 2

INHI 3

INLO 4

RGP2 5

VOCM

10

VPOS

9

OPHI

8

OPLO

7

COMM

6

AD8351

TOP VIEW

(Not to Scale)

12

11

10

1

3

4

9

2

RGP1

INHI

INLO

RGP2

VPOS

OPHI

OPLO

COMM

AD8351

TOP VIEW

(Not to Scale)

NOTES

1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.

2. THE EXPOSED PAD IS INTERNALLY CONNECTED TO

GND AND MUST BE SOLDERED TO A LOW

IMPEDANCE GROUND PLANE.