Data Sheet

AD8351

Rev. D | Page 13 of 19

Figure 35 illustrates a surface acoustic wave (SAW) filter interface.

Many SAW filters are inherently differential, allowing for a low

loss output match. In this example, the SAW filter requires a 50 Ω

source impedance to provide the desired center frequency and

Q. The series L shunt C output network provides a 150 Ω to

50 Ω impedance transformation at the desired frequency of

operation. The impedance transformation is illustrated on a

Smith chart in Figure 36.

It is possible to drive a single-ended SAW filter by connecting

the unused output to ground using the appropriate terminating

resistance. The overall gain of the system is reduced by 6 dB

because only half of the signal is available to the input of the

SAW filter.

Figure 36. Smith Chart Representation of SAW Filter Output Matching Network

Figure 37. Single-Ended Application

SINGLE-ENDED-TO-DIFFERENTIAL OPERATION

The AD8351 can easily be configured as a single-ended-to-

differential gain block, as illustrated in Figure 37. The input signal

is ac-coupled and applied to the INHI input. The unused input

is ac-coupled to ground. Select the values of C1 through C4 such

that their reactances are negligible at the desired frequency of

operation. To balance the outputs, an external feedback resistor,

RF, is required. To select the gain resistor and the feedback resistor,

refer to Figure 38 and Figure 39. From Figure 38, select an RG for

the required dB gain at a given load. Next, select from Figure 39

an RF resistor for the selected RG and load.

Even though the differential balance is not perfect under these

conditions, the distortion performance is still impressive. Figure 13

and Figure 14 show the second and third harmonic distortion

performance when driving the input of the AD8351 using a

single-ended 50 Ω source.

Figure 38. Gain Selection

Figure 39. Feedback Resistor Selection

ADC DRIVING

The circuit in Figure 40 represents a simplified front end of the

AD8351 driving the AD6645, which is a 14-bit, 105 MSPS ADC.

For optimum performance, the AD6645 and the AD8351 are

driven differentially. The resistors R1 and R2 present a 50 Ω

differential input impedance to the source with R3 and R4

providing isolation from the analog-to-digital input. The gain

setting resistor for the AD8351 is RG. The AD6645 presents a

1 kΩ differential load to the AD8351 and requires a 2.2 V p-p

differential signal between AIN and AIN for a full-scale output.

This AD8351 circuit then provides the gain, isolation, and source

matching for the AD6645. The AD8351 also provides a balanced

input, not provided by the balun, to the AD6645, which is essential

for second-order cancellation. The signal generator is bipolar,

centered around ground. Connecting the VOCM pin (Pin 10 on

the MSOP and Pin 13 on the LFCSP) of the AD8351 to the VREF

pin of the AD6645 sets the common-mode output voltage of the

AD8351 at 2.4 V. This voltage is bypassed with a 0.1 μF capacitor.

Increasing the gain of the AD8351 increases the system noise and

thus decrease the SNR but does not significantly affect the

distortion. The circuit in Figure 40 can provide SFDR performance

of better than −90 dBc with a 10 MHz input and −80 dBc with a

70 MHz input at a gain of 10 dB.

200

0

50Ω

150Ω

SERIES L

SHUNT C

500

100

50

25

10

100

500

50

25

10

200

AD8351

RL

RF

RG

0.1µF

0.1µF

0.1µF

50Ω

50Ω

25Ω

0.1µF

35

30

25

20

15

10

5

0

10

1000

100

RG (Ω)

RL = 1000Ω

RL = 150Ω

RL = 500Ω

7

6

5

4

3

2

1

0

10

1000

100

RG (Ω)

RL = 1000Ω

RL = 150Ω

RL = 500Ω