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ADA4938-2ACPZ-R2 数据表(PDF) 7 Page - Analog Devices

部件名 ADA4938-2ACPZ-R2
功能描述  Ultralow Distortion Differential ADC Driver
PDF  26 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADA4938-2ACPZ-R2 数据表(HTML) 7 Page - Analog Devices

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Data Sheet
ADA4938-1/ADA4938-2
Rev. B | Page 7 of 26
ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter
Rating
Supply Voltage
12 V
Power Dissipation
See Figure 4
Storage Temperature Range
−65°C to +125°C
Operating Temperature Range
−40°C to +85°C
Lead Temperature (Soldering, 10 sec)
300°C
Junction Temperature
150°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
θJA is specified for the device (including exposed pad) soldered
to a high thermal conductivity 4-layer circuit board, as described in
EIA/JESD 51-7. The exposed pad is not electrically connected to
the device. It is typically soldered to a pad on the PCB that is
thermally and electrically connected to an internal ground plane.
Table 6. Thermal Resistance
Package Type
θJA
Unit
16-Lead LFCSP (Exposed Pad)
95
°C/W
24-Lead LFCSP (Exposed Pad)
65
°C/W
Maximum Power Dissipation
The maximum safe power dissipation in the ADA4938-1/
ADA4938-2 packages is limited by the associated rise in
junction temperature (TJ) on the die. At approximately 150°C,
which is the glass transition temperature, the plastic changes its
properties. Even temporarily exceeding this temperature limit
can change the stresses that the package exerts on the die,
permanently shifting the parametric performance of the
ADA4938-1/ADA4938-2. Exceeding a junction temperature of
150°C for an extended period can result in changes in the silicon
devices, potentially causing failure.
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive. The quiescent power is the voltage
between the supply pins (VS) times the quiescent current (IS).
The power dissipated due to the load drive depends upon the
particular application. The power due to load drive is calculated
by multiplying the load current by the associated voltage drop
across the device. RMS voltages and currents must be used in
these calculations.
Airflow increases heat dissipation, which effectively reduces θJA.
In addition, more metal directly in contact with the package
leads/exposed pad from metal traces, through-holes, ground,
and power planes reduces the θJA.
Figure 4 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the ADA4938-1,
16-lead LFCSP (95°C/W) and the ADA4938-2, 24-lead LFCSP
(65°C/W) on a JEDEC standard 4-layer board.
3.5
2.5
3.0
2.0
1.5
1.0
0.5
0
–40 –30 –20 –10
0
10
20
30
40
50
60
70
80
90
AMBIENT TEMPERATURE (°C)
ADA4938-1
ADA4938-2
Figure 4. Maximum Power Dissipation vs. Temperature, 4-Layer Board
ESD CAUTION



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