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ADA4945-1ACPZ-R2 数据表(PDF) 43 Page - Analog Devices |
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ADA4945-1ACPZ-R2 数据表(HTML) 43 Page - Analog Devices |
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43 / 57 page ![]() Data Sheet ADA4945-1 analog.com Rev. A 43 of 57 THEORY OF OPERATION Figure 99. ADA4945-1 Architectural Block Diagram The ADA4945-1 is a high speed, low power differential amplifier fabricated on Analog Devices advanced dielectrically isolated SiGe bipolar process. The device provides two closely balanced differential outputs in response to either differential or single-ended input signals. An external feedback network that is similar to a voltage feedback operational amplifier sets the differential gain. The output common-mode voltage is independent of the input common-mode voltage and is set by an external voltage at the VOCM terminal. The PNP input stage allows input common-mode voltages between the negative supply and 1.3 V less than the positive supply. A rail-to-rail output stage supplies a wide output voltage range. The DISABLE pin can reduce the supply current (Iq) of the amplifier to 50 µA. Fully Differential and Common-Mode Signal Paths Figure 99 shows a simplified diagram of the ADA4945-1 architecture. The differential feedback loop consists of the differential transconductance (GDIFF) working through the GO output buffers and the RF/RG feedback networks. The common-mode feedback loop is set up with a voltage divider across the two differential outputs to create an output voltage midpoint (VOUT(CM)) and a common-mode transconductance (GCM). The differential feedback loop forces the voltages at +IN and −IN to equal each other. This voltage equalization sets the following relationships: +DIN RG = − V−OUT RF −DIN RG = − V+OUT RF Subtracting the previous equations gives the relationship that shows RF and RG setting the differential gain. (V+OUT − V−OUT) = (+DIN − (−DIN)) × RF RG GO CC RF RG GCM GDIFF GO RG –OUT +OUT RF +DIN –DIN +IN –IN VOCM CC OUTPUT CLAMP +VCLAMP –VCLAMP |
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