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ADA4945-1ACPZ-R2 数据表(PDF) 14 Page - Analog Devices

部件名 ADA4945-1ACPZ-R2
功能描述  High Speed, ±0.1 μV/˚C Offset Drift, Fully Differential ADC Driver
PDF  57 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADA4945-1ACPZ-R2 数据表(HTML) 14 Page - Analog Devices

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Data Sheet
ADA4945-1
analog.com
Rev. A
14 of 57
Table 6. General Performance
PARAMETER
SYMBOL
TEST
CONDITIONS/COMMENTS
FULL POWER
MODE
LOW POWER
MODE
UNIT
MIN TYP MAX MIN TYP MAX
CLAMP
Clamp Output
Voltage
Differential
−VS
−0.5
+VS
+0.5
−VS
−0.5
+VS
+0.5
V
Common mode
−VS
+VS
−VS
+VS
V
Recovery Time
100
100
ns
Input
Resistance
Resistance between
+VCLAMP and −VCLAMP
480
480
kΩ
DISABLE (DISABLE PIN) MODE
Input Voltage
Disabled
−VS
–0.3
DGND
+ 1
−VS
–0.3
DGND
+ 1
V
Enabled
DGND
+1.4
+VS+
0.3
DGND
+1.4
+VS
+ 0.3
V
Turn Off Time
tOFF
Quiescent current<10% of
enabled quiescent current
6
6
µs
Turn On Time
tON
tO >90% of final VOUT
1.2
2
µs
DISABLE
Pin
Bias Current
Enabled
DISABLE
= 5 V
50
50
nA
DISABLE
Pin
Bias Current
Disabled
DISABLE
= 0 V
50
50
nA
DGND PIN
VOLTAGE
RANGE
IVRDGND
−VS
+VS
– 2.5
−VS
+VS
– 2.5
V
POWER SUPPLY
Operating
Range
±VS
3
10
3
10
V
Quiescent
Current
Enabled
Iq
Full power mode, MODE = +VS
4
4.2
mA
Low power mode, MODE = −VS
1.4
1.6
mA
Quiescent
Current
Disabled
Full power mode, MODE = +VS
60
70
µA
Low power mode, MODE = −VS
60
70
µA
+PSRR
+PSRR
ΔVOS,dm/ΔVS, ΔVS = 1 V p-p
-120
-120
dB
−PSRR
-PSRR
ΔVOS,dm/ΔVS, ΔVS= 1 V p-p
-120
-120
dB



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