ADA4530-1ARZ-R7 datasheet(42/52 Pages) AD

42 / 52 page

Data Sheet

ADA4530-1

LAYOUT GUIDELINES

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Rev. C | 42 of 52

PHYSICAL IMPLEMENTATION OF GUARDING

TECHNIQUES

In the Guarding section, guarding is introduced as a technique

fundamental to high impedance work. The goal of guarding is to

completely surround the insulation of the high impedance node with

another conductor that is driven to the guard voltage. This ideal

is impossible to achieve in practice; however, there are several

practical structures that provide good performance.

GUARD RING

A guard ring is a structure typically used to implement the guarding

technique on the surface of the PCB. A simplified layout of the

buffer circuit implements the guard ring around the high impedance

(A) trace (see Figure 121). The output of the voltage sensor is wired

directly to the A and B pads in Figure 121. The guard ring is a

filled copper shape that completely surrounds the high impedance

(A) trace from the sensor connection to the noninverting input (Pin

1). The guard ring is driven directly from the ADA4530-1 guard

buffer (Pin 2) through a thermal relief shape connection. It is not

necessary to connect the other guard buffer output (Pin 7).

The solder mask is removed from the high impedance trace and the

guard trace to ensure that the guard makes electrical contact with

any surface leakage paths. For the same reason, avoid printing any

silkscreen in this section.

Figure 121. Buffer Circuit Layout

There is not a large amount of exposed insulation between the A

trace and the guard ring. It is often counterproductive to increase

this spacing to try to increase the insulation resistance because

the exposed insulator tends to accumulate surface charges gener-

ated from piezoelectric or triboelectric effects. These charges are

eventually swept across the insulator toward the high impedance

conductor.

The magnitude of this error current is dependent on the area of the

exposed high impedance insulation. A gap of 15 mil between the A

trace and the guard ring is sufficient.

Another simplified layout demonstrates the implementation of a

guard ring in the TIA circuit (see Figure 122). The guard ring is

implemented in the same manner as the buffer circuit. The primary

difference is that the left half of the feedback resistor (RF) and

feedback capacitor (CF) are connected to the high impedance

node. The guard ring shape is extended around these passive

components to ensure that the entire high impedance node is

surrounded by guard. The guard ring is directly driven from the

ADA4530-1 guard buffer (Pin 7).

Figure 122. TIA Circuit Layout

The guard voltage in the TIA circuit is nominally equal to the B

voltage, which makes it possible to drive the guard ring directly from

the B voltage without using the ADA4530-1 guard buffer. When

implementing the guard ring this way, do not make any connection

to the guard buffer outputs (Pin 2 and Pin 7).

GUARD PLANE

A guard plane is a structure used to implement the guarding

technique through the bulk of the PCB. The structure of the guard

plane is shown in a cross section of the PCB (see Figure 123). The

guard plane is a filled copper shape that is placed directly below the

high impedance (A) trace. This plane is connected to the guard ring

on the surface layer with vias.

If the circuit board is constructed using high performance PCB

laminates such as Rogers 4350B, a hybrid stackup is required for

mechanical strength. The outside layers are ceramic, whereas the

core layers are conventional glass epoxy laminate. It is important to

place the guard shield on the boundary of the ceramic and glass

epoxy materials to protect the high impedance node from the poor

dielectric relaxation characteristics of the glass epoxy materials.

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