ADA4932-1YCPZ-R7 datasheet(23/27 Pages) AD

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Data Sheet

ADA4932-1/ADA4932-2

APPLICATIONS INFORMATION

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Rev. F | 23 of 27

The final circuit is shown in Figure 62.

Figure 62. Terminated Single-Ended-to-Differential System with G = 2

INPUT COMMON-MODE VOLTAGE RANGE

The ADA4932-1/ADA4932-2 input common-mode range is shifted

down by approximately one VBE, in contrast to other ADC drivers

with centered input ranges such as the ADA4932-1/ADA4932-2.

The downward-shifted input common-mode range is especially

suited to dc-coupled, single-ended-to-differential, and single-supply

applications.

For ±5 V operation, the input common-mode range at the summing

nodes of the amplifier is specified as −4.8 V to +3.2 V, and is speci-

fied as +0.2 V to +3.2 V with a +5 V supply. To avoid nonlinearities,

the voltage swing at the +IN and −IN terminals must be confined to

these ranges.

INPUT AND OUTPUT CAPACITIVE AC

COUPLING

While the ADA4932-1/ADA4932-2 is best suited to dc-coupled ap-

plications, it is nonetheless possible to use it in ac-coupled circuits.

Input ac coupling capacitors can be inserted between the source

and RG. This ac coupling blocks the flow of the dc common-mode

feedback current and causes the ADA4932-1/ADA4932-2 dc input

common-mode voltage to equal the dc output common-mode volt-

age. These ac coupling capacitors must be placed in both loops to

keep the feedback factors matched. Output ac coupling capacitors

can be placed in series between each output and its respective

load.

SETTING THE OUTPUT COMMON-MODE

VOLTAGE

The VOCM/VOCMx pin of the ADA4932-1/ADA4932-2 is internally

biased with a voltage divider comprised of two 50 kΩ resistors

across the supplies, with a tap at a voltage approximately equal

to the midsupply point, [(+VS) + (−VS)]/2. Because of this internal di-

vider, the VOCM/VOCMx pin sources and sinks current, depending on

the externally applied voltage and its associated source resistance.

Relying on the internal bias results in an output common-mode

voltage that is within about 100 mV of the expected value.

In cases where more accurate control of the output common-mode

level is required, it is recommended that an external source or

resistor divider be used with source resistance less than 100 Ω.

If an external voltage divider consisting of equal resistor values

is used to set VOCM to midsupply with greater accuracy than pro-

duced internally, higher values can be used because the external

resistors are placed in parallel with the internal resistors. The output

common-mode offset listed in the Specifications section assumes

that the VOCM input is driven by a low impedance voltage source.

It is also possible to connect the VOCM input to a common-mode

level (CML) output of an ADC; however, care must be taken to

ensure that the output has sufficient drive capability. The input im-

pedance of the VOCM/VOCMx pin is approximately 25 kΩ. If multiple

ADA4932-1/ADA4932-2 devices share one ADC reference output,

a buffer may be necessary to drive the parallel inputs.

HIGH PERFORMANCE PRECISION ADC

DRIVER

Using a differential amplifier to drive an ADC successfully is linked

to balancing each side of the differential amplifier correctly. Figure

64 shows the schematic for the ADA4932-1, AD7626, and associ-

ated circuitry. In the test circuit used, a 2.4 MHz band-pass filter

follows the signal source. The band-pass filter eliminates harmonics

of the 2.4 MHz signal and ensures that only the frequency of

interest is passed and processed by the ADA4932-1 and AD7626.

The ADA4932-1 is particularly useful when driving higher frequency

inputs to the AD7626, a 10 MSPS ADC with a switched capacitor

input. The resistor (R8, R9) and capacitor (C5, C6) circuit between

the ADA4932-1 and AD7626 IN+ and IN− pins acts as a low-pass

filter to noise. The filter limits the input bandwidth to the AD7626,

but its main function is to optimize the interface between the

driving amplifier and the AD7626. The series resistor isolates the

driver amplifier from high frequency switching spikes from the ADC

switched capacitor front end. The AD7626 data sheet shows values

of 20 Ω and 56 pF. In Figure 64, these values were empirically

optimized to 33 Ω and 56 pF. The resistor-capacitor combination

can be optimized slightly for the circuit and input frequency being

converted by simply varying the R-C combination; however, keep

in mind that having the incorrect combination limits the THD and

linearity performance of the AD7626. In addition, increasing the

bandwidth as seen by the ADC introduces more noise. Another as-

pect of optimization is the selection of the power supply voltages

for the ADA4932-1. In the circuit, the output common-mode voltage

(VCM pin) of the AD7626 is 2.048 V for the internal reference

voltage of 4.096 V, and each input (IN+, IN−) swings between

0 V and 4.096 V, 180° out of phase. This provides an 8.2 V

full-scale differential input to the ADC. The ADA4932-1 output stage

requires about 1.4 V headroom with respect to each supply voltage

for linear operation. Optimum distortion performance is obtained

when the supply voltages are approximately symmetrical about the

common-mode voltage. If a negative supply of −2.5 V is chosen,

then a positive supply of at least +6.5 V is needed for symmetry

about the common-mode voltage of 2.048 V.

Experiments performed indicate that a positive supply of 7.25 V

gives the best overall distortion for a 2.4 MHz tone. Using a low

jitter clock source and a single tone −1 dBFS amplitude, 2.402 MHz

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