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AD8099ACPZ-R2 数据表(PDF) 21 Page - Analog Devices

部件名 AD8099ACPZ-R2
功能描述  Ultralow Distortion, High Speed, 0.95 nV/√Hz Voltage Noise Op Amp
PDF  26 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD8099ACPZ-R2 数据表(HTML) 21 Page - Analog Devices

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Data Sheet
AD8099
Rev. E | Page 21 of 26
TOTAL OUTPUT NOISE CALCULATIONS AND
DESIGN
To analyze the noise performance of an amplifier circuit,
the individual noise sources must be identified. A user must
then determine if the source has a significant contribution to
overall noise performance of the amplifier. To simplify the
noise calculations, this data sheet works with noise spectral
densities rather than actual voltages to leave bandwidth out
of the expressions (noise spectral density, which is generally
expressed in nV/√Hz, is equivalent to the noise in a 1 Hz
bandwidth).
The noise model shown in Figure 74 has six individual noise
sources: the Johnson noise of the three resistors, the op amp
voltage noise, and the current noise in each input of the amplifier.
Each noise source has its own contribution to the noise at the
output. Noise is generally specified referred to input (RTI), but
it is often simpler to calculate the noise referred to the output
(RTO) and then divide by the noise gain to obtain the RTI noise.
All resistors have a Johnson noise of √(4kBTR), where k is
Boltzmann’s Constant (1.38 × 10−23 J/K), T is the absolute
temperature in Kelvin, B is the bandwidth in Hz, and R is
the resistance in ohms. A simple relationship, which is easy to
remember, is that a 50 Ω resistor generates a Johnson noise of
1 nV√Hz at 25°C. The AD8099 amplifier has roughly the same
equivalent noise as a 50 Ω resistor.
GAIN FROM
"B" TO OUTPUT
= –
R2
R1
GAIN FROM
"A" TO OUTPUT
=
NOISE GAIN =
NG = 1 +
R2
R1
IN–
VN
VN, R1
VN, R3
R1
R2
IN+
R3
4kTR2
4kTR1
4kTR3
VN, R2
B
A
VN2 + 4kTR3 + 4kTR1
R2
2
R1 + R2
IN+2R32 + IN–2
R1 × R2
2
+ 4kTR2
R1
2
R1 + R2
R1 + R2
RTI NOISE =
RTO NOISE = NG × RTI NOISE
VOUT
+
Figure 74. Op Amp Noise Analysis Model
In applications where noise sensitivity is critical, care must be
taken not to introduce other significant noise sources to the
amplifier. Each resistor is a noise source. Attention to design,
layout, and component selection is critical to maintain low
noise performance. A summary of noise performance for the
amplifier and associated resistors can be seen in Table 4.
INPUT BIAS CURRENT AND DC OFFSET
In high noise gain configurations, the effects of output offset
voltage can be significant, even with low input bias currents and
input offset voltages. Figure 75 shows a comprehensive offset
voltage model, which can be used to determine the referred to
output (RTO) offset voltage of the amplifier or referred to input
(RTI) offset voltage.
GAIN FROM
"B" TO OUTPUT
= –
R2
R1
GAIN FROM
"A" TO OUTPUT
=
NOISE GAIN =
NG = 1 +
R2
R1
IB–
VOS
R1
R2
IB+
R3
B
A
OFFSET (RTO) = VOS 1 +
R2
+ IB+ × R3 1 +
R2
– IB– × R2
R1
R1
OFFSET (RTI) = VOS + IB+ × R3 – IB–
R1 × R2
R1 + R2
OFFSET (RTI) = VOS
IF IB+ = IB– AND R3 =
R1 × R2
R1 + R2
VOUT
FOR BIAS CURRENT CANCELLATION:
Figure 75. Op Amp Total Offset Voltage Model
For RTO calculations, the input offset voltage and the voltage
generated by the bias current flowing through R3 are multiplied
by the noise gain of the amplifier. The voltage generated by IB−
through R2 is summed together with the previous offset voltages to
arrive at a final output offset voltage. The offset voltage can also
be referred to the input (RTI) by dividing the calculated output
offset voltage by the noise gain.
As seen in Figure 75, if IB+ and IB– are the same and R3 equals
the parallel combination of R1 and R2, then the RTI offset
voltage can be reduced to only VOS.This is a common method
used to reduce output offset voltage. Keeping resistances low
helps to minimize offset error voltage and keeps the voltage
noise low.
DISABLE PIN AND INPUT BIAS CANCELLATION
The AD8099 DISABLE pin performs three functions; enable,
disable, and reduction of the input bias current. When the
DISABLE pin is brought to within 0.7 V of the positive supply,
the input bias current is reduced by an approximate factor of 60.
However, the input current noise doubles to 5.2 pA/√Hz. Table 5
outlines the DISABLE pin functionality.
Table 5. DISABLE Pin Truth Table
Supply Voltage
±5 V
+5 V
Disable
−5 to +2.4
0 to 2.4
Enable
Open
Open
Low Input Bias Current
4.3 to 5
4.3 to 5



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