ENC28J60-CSLASHSS datasheet(3/96 Pages) MICROCHIP

3 / 96 page

Preliminary

DS39662B-page 1

ENC28J60

Ethernet Controller Features

• IEEE 802.3 compatible Ethernet controller

• Integrated MAC and 10BASE-T PHY

• Supports one 10BASE-T port with automatic

polarity detection and correction

• Supports Full and Half-Duplex modes

• Programmable automatic retransmit on collision

• Programmable padding and CRC generation

• Programmable automatic rejection of erroneous

packets

• SPI Interface with clock speeds up to 20 MHz

Buffer

• 8-Kbyte transmit/receive packet dual port SRAM

• Configurable transmit/receive buffer size

• Hardware-managed circular receive FIFO

• Byte-wide random and sequential access with

auto-increment

• Internal DMA for fast data movement

• Hardware assisted checksum calculation for vari-

ous network protocols

Medium Access Controller (MAC)

Features

• Supports Unicast, Multicast and Broadcast

packets

• Programmable receive packet filtering and

wake-up host on logical AND or OR of the

following:

- Unicast destination address

- Multicast address

- Broadcast address

- Magic Packet™

- Group destination addresses as defined by

64-bit hash table

- Programmable pattern matching of up to

64 bytes at user-defined offset

Physical Layer (PHY) Features

• Loopback mode

• Two programmable LED outputs for LINK, TX,

RX, collision and full/half-duplex status

Operational

• Six interrupt sources and one interrupt output pin

• 25 MHz clock input requirement

• Clock out pin with programmable prescaler

• Operating voltage of 3.1V to 3.6V (3.3V typical)

• 5V tolerant inputs

• Temperature range: -40°C to +85°C Industrial,

0°C to +70°C Commercial (SSOP only)

• 28-pin SPDIP, SSOP, SOIC, QFN packages

Package Types

28-Pin SPDIP, SSOP, SOIC

OSC2

OSC1

NC*

89 10

28 27 26 25 24 23 22

ENC28J60

11 12 13 14

VDDOSC

28-pin QFN

RESET

SCK

VSSRX

VDDRX

VSSOSC

VDDPLL

VSSPLL

VCAP

OSC2

OSC1

VDDRX

VSSTX

TPOUT+

TPOUT-

LEDA

LEDB

VDDOSC

VSSOSC

VDDTX

VDDPLL

VSSPLL

CLKOUT

RESET

TPIN+

TPIN-

RBIAS

INT

NC*

SCK

VDD

VSS

VSSRX

* Reserved pin; always leave disconnected.

Stand-Alone Ethernet Controller with SPI Interface

ENC28J60-C/SS 数据表(PDF) 3 Page - Microchip Technology

ENC28J60-C/SS 数据表(HTML) 3 Page - Microchip Technology

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