ENC28J60-CSLASHSS datasheet(39/96 Pages) MICROCHIP

39 / 96 page

Preliminary

DS39662B-page 37

ENC28J60

6.6

PHY Initialization Settings

Depending on the application, bits in three of the PHY

module’s registers may also require configuration.

The PHCON1.PDPXMD bit partially controls the

device’s half/full-duplex configuration. Normally, this bit

is initialized correctly by the external circuitry (see

Section 2.6 “LED Configuration”). If the external

circuitry is not present or incorrect, however, the host

controller must program the bit properly. Alternatively,

for an externally configurable system, the PDPXMD bit

may be read and the FULDPX bit be programmed to

match.

For proper duplex operation, the PHCON1.PDPXMD

bit must also match the value of the MACON3.FULDPX

bit.

If using half duplex, the host controller may wish to set

the

PHCON2.HDLDIS

bit

prevent

automatic

loopback of the data which is transmitted.

The PHY register, PHLCON, controls the outputs of

LEDA and LEDB. If an application requires a LED

configuration other than the default, PHLCON must be

altered to match the new requirements. The settings for

LED operation are discussed in Section 2.6 “LED

Configuration”. The PHLCON register is shown in

PHCON2: PHY CONTROL REGISTER 2

U-0

R/W-0

—

FRCLNK

TXDIS

JABBER

HDLDIS

bit 15

bit 8

R/W-0

rrrr

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

Unimplemented: Read as ‘0’

bit 14

FRCLNK: PHY Force Linkup bit

= Force linkup even when no link partner is detected

= Normal operation

bit 13

TXDIS: Twisted-Pair Transmitter Disable bit

= Disable twisted-pair transmitter

= Normal operation

bit 12-11

Reserved: Write as ‘0’

bit 10

JABBER: Jabber Correction Disable bit

= Disable jabber correction

= Normal operation

bit 9

Reserved: Write as ‘0’

bit 8

HDLDIS: PHY Half-Duplex Loopback Disable bit

When PHCON1<8> = 1 or PHCON1<14> = 1:

This bit is ignored.

When PHCON1<8> = 0 and PHCON1<14> = 0:

= Transmitted data will only be sent out on the twisted-pair interface

= Transmitted data will be looped back to the MAC and sent out on the twisted-pair interface

bit 7-0

Reserved: Write as ‘0’

ENC28J60-C/SS 数据表(PDF) 39 Page - Microchip Technology

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