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PIC16F-E/ML 数据表(PDF) 104 Page - Microchip Technology |
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PIC16F-E/ML 数据表(HTML) 104 Page - Microchip Technology |
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104 / 178 page  PIC16F627A/628A/648A DS40044F-page 102 © 2007 Microchip Technology Inc. 14.4.5 TIME OUT SEQUENCE On power-up, the time out sequence is as follows: First PWRT time-out is invoked after POR has expired. Then OST is activated. The total time out will vary based on oscillator configuration and PWRTE bit Status. For example, in RC mode with PWRTE bit set (PWRT disabled), there will be no time out at all. Figure 14-8, Figure 14-11 and Figure 14-12 depict time out sequences. Since the time outs occur from the POR pulse, if MCLR is kept low long enough, the time outs will expire. Then bringing MCLR high will begin execution immediately (see Figure 14-11). This is useful for testing purposes or to synchronize more than one PIC16F627A/628A/ 648A device operating in parallel. Table 14-6 shows the Reset conditions for some special registers, while Table 14-7 shows the Reset conditions for all the registers. 14.4.6 POWER CONTROL (PCON) STATUS REGISTER The PCON/Status register, PCON (address 8Eh), has two bits. Bit 0 is BOR (Brown-out Reset). BOR is unknown on Power-on Reset. It must then be set by the user and checked on subsequent Resets to see if BOR = 0 indicating that a brown-out has occurred. The BOR Status bit is a “don’t care” and is not necessarily predictable if the brown-out circuit is disabled (by setting BOREN bit = 0 in the Configuration Word). Bit 1 is POR (Power-on Reset). It is a ‘0’ on Power-on Reset and unaffected otherwise. The user must write a ‘1’ to this bit following a Power-on Reset. On a subsequent Reset if POR is ‘0’, it will indicate that a Power-on Reset must have occurred (VDD may have gone too low). TABLE 14-3: TIME OUT IN VARIOUS SITUATIONS TABLE 14-4: STATUS/PCON BITS AND THEIR SIGNIFICANCE Oscillator Configuration Power-up Timer Brown-out Reset Wake-up from Sleep PWRTE = 0 PWRTE = 1 PWRTE = 0 PWRTE = 1 XT, HS, LP 72 ms + 1024•TOSC 1024•TOSC 72 ms + 1024•TOSC 1024•TOSC 1024•TOSC RC, EC 72 ms — 72 ms — — INTOSC 72 ms — 72 ms — 6 μs POR BOR TO PD Condition 0X11 Power-on Reset 0X0X Illegal, TO is set on POR 0XX0 Illegal, PD is set on POR 10XX Brown-out Reset 110u WDT Reset 1100 WDT Wake-up 11uu MCLR Reset during normal operation 1110 MCLR Reset during Sleep Legend: u = unchanged, x = unknown |
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