Data Sheet

ADL8111

THEORY OF OPERATION

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Rev. A | 20 of 24

The ADL8111 integrates an amplifier with two switching networks

located at the RF input and output. The amplifier, which is internally

ac-coupled on its input and output, uses a gallium arsenide (GaAs)

LNA die from the HMC8411. The switching network employs robust

silicon-on-insulator (SOI) technology for fast switching and a short

settling time. This integrated solution has four different signal path

states available: an internal amplifier, an internal bypass, External

Bypass A, and External Bypass B. Signal path states are controlled

through the digital pins, VA and VB, using 1.4 V high and 0 V low

logic (see Figure 80 to Figure 83). The internal amplifier is biased

up by applying 5 V to VDD_PA, and the internal switches are biased

up by applying +3.3 V and −3.3 V to VDD_SW and VSS_SW,

respectively. DC bias to the switches is independent of the LNA.

Turning off bias to VDD_PA to the LNA provides better isolation

between RF ports.

SIGNAL PATH STATES FOR DIGITAL CONTROL

INPUTS

Figure 80. External Bypass A, VA = 0 V and VB = 0 V

Figure 81. Internal Amplifier, VA = 0 V and VB = 3.3 V

Figure 82. Internal Bypass, VA = 3.3 V and VB = 0 V

Figure 83. External Bypass B, VA = 3.3 V and VB = 3.3 V

Table 8. Truth Table

State Name

Digital Control Inputs

Signal Path State

VA

VB

External Bypass A

Low

Low

RFIN to OUT_A, IN_A to RFOUT

Internal Amplifier

Low

High

RFIN to RFOUT through amplifier path

Internal Bypass

High

Low

RFIN to RFOUT through bypass path

External Bypass B

High

High

RFIN to OUT_B, IN_B to RFOUT