CS42528 datasheet(33/91 Pages) CIRRUS

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DS586F1

CS42528

4.6.4

One-Line Mode (OLM) Configurations

4.6.4.1

OLM Config #1

One-Line Mode Configuration #1 can support up to 8 channels of DAC data, 6 channels of ADC data and

2 channels of S/PDIF received data. This is the only configuration which will support up to 24-bit samples

at a sampling frequency of 48 kHz on all channels for both the DAC and ADC.

Description

Functional Mode Register (addr = 03h)

Set CODEC_FMx = SAI_FMx = 00,01,10

CX_LRCK must equal SAI_LRCK; sample rate conversion not supported

Set ADC_SP SELx = 00

Configure ADC data on CX_SDOUT, S/PDIF data on SAI_SDOUT

Interface Format Register (addr = 04h)

Set DIFx bits to proper serial format

Select the digital interface format when not in One-Line Mode

Set ADC_OLx bits = 00,01,10

Select ADC operating mode, see table below for valid combinations

Set DAC_OLx bits = 00,01,10

Select DAC operating mode, see table below for valid combinations

Misc. Control Register (addr = 05h)

Set CODEC_SP M/S = 1

Configure CODEC Serial Port to master mode.

Set SAI_SP M/S = 1

Configure Serial Audio Interface Port to master mode.

Set EXT ADC SCLK = 0

Identify external ADC clock source as SAI Serial Port.

DAC Mode

Not One-Line Mode

One-Line Mode #1

One-Line Mode #2

ADC Mode

Not One-

Line Mode

CX_SCLK=64 Fs

CX_LRCK=SSM/DSM/QSM

SAI_SCLK=64 Fs

SAI_LRCK=CX_LRCK

CX_SCLK=128 Fs

CX_LRCK=SSM/DSM

SAI_SCLK=64 Fs

SAI_LRCK=CX_LRCK

not valid

One-Line

Mode #1

CX_SCLK=128 Fs

CX_LRCK=SSM/DSM

SAI_SCLK=64 Fs

SAI_LRCK=CX_LRCK

CX_SCLK=128 Fs

CX_LRCK=SSM/DSM

SAI_SCLK=64 Fs

SAI_LRCK=CX_LRCK

not valid

One-Line

Mode #2

CX_SCLK=256 Fs

CX_LRCK=SSM

SAI_SCLK=64 Fs

SAI_LRCK=CX_LRCK

not valid

CX_SCLK=256 Fs

CX_LRCK=SSM

SAI_SCLK=64 Fs

SAI_LRCK=CX_LRCK

SCLK_PORT1

LRCK_PORT1

SDIN_PORT1

SCLK_PORT2

LRCK_PORT2

SDIN_PORT2

SCLK_PORT3

LRCK_PORT3

SDOUT1_PORT3

SDOUT2_PORT3

SDOUT3_PORT3

SDOUT4_PORT3

SAI_SCLK

SAI_LRCK

SAI_SDOUT

CX_SCLK

CX_LRCK

CX_SDOUT

CX_SDIN1

CX_SDIN2

CX_SDIN3

CX_SDIN4

RMCK

ADCIN1

ADCIN2

MCLK

SDOUT1

SDOUT2

LRCK

SCLK

64Fs

SPDIF Data

ADC Data

64Fs,128Fs, 256Fs

DIGITAL AUDIO

PROCESSOR

CS5361

MCLK

Figure 16. OLM Configuration #1

CS42528

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