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P3C1024L55SC 数据表(PDF) 7 Page - Pyramid Semiconductor Corporation

部件名 P3C1024L55SC
功能描述  ULTRA LOW POWER 128K x 8 CMOS STATIC RAM
PDF  10 Pages
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制造商  PYRAMID [Pyramid Semiconductor Corporation]
网页  http://www.pyramidsemiconductor.com
标志 PYRAMID - Pyramid Semiconductor Corporation

P3C1024L55SC 数据表(HTML) 7 Page - Pyramid Semiconductor Corporation

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P3C1024L
Page 7 of 9
Document # SRAM132 REV OR
DATA RETENTION
1.
CE
1 ≥ VDR -0.2V, CE2 ≥ VDR -0.2V or CE2 ≤ 0.2V; or CE1 ≤ 0.2V, CE2 - 0.2V; VIN ≥ VDR -0.2V or VIN ≤ 0.2V
2. V
CC ramp from VDR to VCC (min) > 100 µs for full device operation.
LOW V
CC DATA RETENTION WAVEFORM 1 (CE
CE
CE
CE
CE
1 CONTROLLED)
Symbol
Parameter
Test Conditions
Unit
Max
Min
V
DR
I
CCDR
(1)
V
CC for Data Retention
Data Retention Current
CE
1 ≥ VCC -0.2V, CE2 ≤ 0.2V,
V
IN ≥ VCC -0.2V or VIN ≤ 0.2V
2.0
V
V
DR = 2.0V
10
µA
t
R
Operating Recovery Time(2)
Chip Deselect to Data
Retention Time
See Retention Waveform
100
0
µs
ns
t
CDR
LOW V
CC DATA RETENTION WAVEFORM 2 (CE2 CONTROLLED)



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